A printed circuit board includes a plurality of layers including attachment layers and routing layers; and via patterns formed in the plurality of layers, each of the via patterns including first and second signal vias forming a differential signal pair, the first and second signal vias extending through at least the attachment layers; ground vias extending through at least the attachment layers, the ground vias including ground conductors; and shadow vias located adjacent to each of the first and second signal vias, wherein the shadow vias are free of conductive material in the attachment layers. The printed circuit board may further include slot vias extending through the attachment layers and located between via patterns.

Technologies directed to coupling structures for antenna feeds of phased array antennas are described. One circuit board includes a first layer with a first portion of a RF coupling structure, a second layer with a second portion of the RF coupling structure, and a first insulation layer located between the first layer and the second layer. The RF coupling structure is configured to electromagnetically couple a first conductive trace on the first layer and a second conductive trace on the second layer at RF frequencies. The circuit board also includes an RF shielding structure coupled to a ground connection on the second layer and located in the first insulation layer. The RF shielding structure is configured to operate as a RF short circuit between the ground connection and a third conductive trace on the first layer at RF frequencies.

A high-frequency circuit includes a first dielectric layer, a circuit layer, a second dielectric layer arranged in this order, the circuit layer includes a transmission line of a high-frequency signal and a ground pattern disposed around the transmission line. An electromagnetic wave shield is disposed in the first dielectric layer and the second dielectric layer around the transmission line. The electromagnetic wave shield includes a first ground electric conductor formed on an inner surface of at least one first hole formed to extend through the first dielectric layer without extending through the ground pattern, and a second ground electric conductor formed on an inner surface of at least one second hole formed to extend through the second dielectric layer without extending through the ground pattern. The first ground electric conductor and the second ground electric conductor are each electrically connected to the ground pattern.

A high frequency filter includes: a multilayer substrate including a first substrate for which lands are provided, a second substrate for which lands are provided, and a third substrate for which lands are provided, the third substrate being sandwiched between the first substrate and the second substrate; a columnar conductor electrically connected to the lands in the multilayer substrate; and columnar conductors provided to surround the columnar conductor, electrically connected to a ground plane of the first substrate, and electrically connected to a ground plane of the second substrate. The spacing between the lands of the first substrate and the lands of the third substrate and the spacing between the lands of the second substrate and the lands of the third substrate are electrical lengths of 90 degrees or less at the cutoff frequency.

Embodiments described herein may be related to apparatuses, processes, and techniques related to creating coaxial structures within glass package substrates. These techniques, in embodiments, may be extended to create other structures, for example capacitors within glass substrates. Other embodiments may be described and/or claimed.

A wiring circuit board includes a porous insulating layer, and a first conductive layer sequentially toward one side in the thickness direction. The first conductive layer includes a first signal wire and first ground wires. Each of the first ground wires is thicker than the first signal wire.

The invention relates to a flip-chip integrated circuit package of the ball array type, wherein: the underside of the package includes a plurality of receiving pads for signal, ground and solder balls; stacks of signal and ground vias, electrically connected to respective receiving pads, pass vertically through the package's dielectric body forming a quasi-coaxial structure. In an upper part of the package body: the signal vias are electrically connected to a lesser number of signal conductive bumps protruding from the upper surface of the package's dielectric body; and at least two ground vias are connected by means of conductive projections to respective ground conductive bumps, forming a ring around the signal conductive bumps.

For example, an apparatus may include a Printed Circuit Board (PCB) including a Ball Grid Array (BGA) on a first side of the PCB, the BGA configured to connect a Surface Mounted Device (SMD) to the PCB; an antenna disposed on a second side of the PCB opposite to the first side, the antenna to communicate a Radio Frequency (RF) signal of the SMD; and an RF transition to transit the RF signal between the BGA and the antenna, the RF transition including a plurality of signal buried-vias; a first plurality of microvias configured to transit the RF signal between the plurality of signal buried-vias and a ball of the BGA, the first plurality of microvias are rotationally misaligned with respect to the plurality of signal buried-vias; and a second plurality of microvias configured to transit the RF signal between the plurality of signal buried-vias and the antenna.

An example electronic device includes a housing, a first board and a second board disposed in an interior of the housing and disposed to face each other in a first direction, an interposer extending to surround an interior space between the first board and the second board, a first conductive layer disposed to face the first board and including a first conductive area, a second conductive layer disposed to face the second board and including a second conductive area, an insulation layer disposed between the first conductive layer and the second conductive layer, a first insulation part disposed between the first conductive layer and the first board and covering the first conductive area, a second insulation part disposed between the second conductive layer and the second board and covering the second conductive area, a first plating area extending from the first conductive layer to the second conductive layer, on a first side surface of the insulation layer, and a second plating area extending from the first conductive layer to the second conductive layer, on a second side surface of the insulation layer.

A circuit board may include a traditional via electrically coupled to a first layer of the circuit board and coupled to a second layer of the circuit board and a slotted via formed within the circuit board proximate to the traditional via, the slotted via comprising an opening through a first surface and a second surface of the circuit board and a layer of conductive material formed on interior walls of the opening.