A multilayer ceramic electronic component includes a first metal terminal including a first plating film on a surface of a first terminal main body, and a second metal terminal including a second plating film on a surface of the second terminal main body. The first metal terminal includes a surface connected to the first external electrode on which a first recess portion is provided such that the first terminal main body is exposed. The second metal terminal includes a surface connected to the second external electrode on which a second recess portion is provided such that the second terminal main body is exposed. The first and second recess portions each include cavities. An exterior material covers the multilayer ceramic electronic component main body, the bonding material, a portion of the first metal terminal, and a portion of the second metal terminal.

An electronic component includes: a capacitor body; a pair of external electrodes disposed on opposite end surfaces of the capacitor body, respectively; and a pair of metal frames respectively including a pair of connected portions connected to the pair of external electrodes, respectively, and a pair of mounted portions bent at and extending from one ends of the pair of connected portions, respectively, wherein corners of end portions of the pair of mounted portions facing each other have a curved surface.

A component-on-package circuit may include a component for an electrical circuit and a circuit module attached to the component. The circuit module may have circuitry and at least one leadframe which connects the circuitry to the component both electrically and thermally. The leadframe may have a high degree of both electrical and thermal conductivity and a non-planar shape that provides spring-like cushioning of force applied to the component in the direction of the circuit module.

An electronic component and a board having the same mounted thereon are provided. The electronic component includes a capacitor body, a pair of external electrodes, respectively disposed on end portions of the capacitor body, a pair of metal frames, respectively disposed to be connected the pair of external electrodes, and a conductive bonding layer disposed between the external electrode and the metal frame and having a discontinuous region.

Systems and methods are disclosed that may include identifying a first coefficient of thermal expansion for a first component, the first component including component pins having a first pitch value; identifying a second coefficient of thermal expansion for a second component, the second component associated with electrically conductive pads; determining a relative expansion value based on the first coefficient of thermal expansion and the second coefficient of thermal expansion; determining a change in temperature value of the first component and the second component, the change in temperature value indicating a change in temperature caused by a soldering process; and determining a second pitch value for the electrically conductive pads based on a product of the relative expansion value, the first pitch value, and the change in temperature value, the second pitch value causing an alignment between the component pins and the electrically conductive pads during the soldering process.

A connector 10 disclosed by this specification is to be mounted on a circuit board having lands and includes a housing 12 to be connected to a mating housing, and a pair of pegs (board fixing portions) 16 to be respectively mounted into both side portions of the housing 12 and soldered and fixed to the lands. The pair of pegs 16 respectively have peg-side contact surfaces (fixing portion-side contact surfaces) 26S to be held in surface contact with a pair of housing-side contact surfaces 52S located on both side surfaces of the housing 12. The housing 12 includes a pair of first projections (projections) 64 projecting toward back surfaces 26B of the pair of pegs 16 on sides opposite to the peg-side contact surfaces 26S.

An electronic device includes a printed circuit board (PCB). The PCB includes first and second grids disposed at a top surface and a bottom surface of the PCB, respectively. Each grid includes a plurality of footprint pins, and a plurality of vias extending through the PCB to the top and bottom surfaces. Each footprint pin includes a connecting end and a free end that opposes the connecting end. Each via includes a contact end located at one of grids and is in electrical contact with the connecting end of one of the footprint pins, and each via further includes a non-contact end that is located at the other of the grids and is not in electrical contact with any of the footprint pins. First and second connectors are mounted to the PCB top and bottom surfaces and connect with the footprint pins of the first and second grids.

A structure with controlled capillary coverage is provided and includes a substrate including one or more first contacts, a component and adhesive. The component includes one or more second contacts and a rib disposed at a distance from each of the one or more second contacts. The component is disposed such that the one or more second contacts are communicative with the one or more first contacts and corresponding surfaces of the substrate and the rib face each other at a controlled gap height to define a fill-space. The adhesive is dispensed at a discrete point whereby the adhesive is drawn to fill the fill-space by capillary action.

A design method and a packaging method for a PCB board to avoid patch element tombstone, and a PCB board are provided. The method includes: providing at least one patch element placement area on a PCB board, providing pads in each patch element placement area, where each pad group includes two pads, and the two pads are arranged side by side; establishing pad limit areas around the pads; and reflow soldering the patch element to the PCB board. With the above method, the tombstone phenomenon of the patch element can be effectively prevented, the design efficiency is improved, the workload of manual operation of the engineer is reduced, and an error rate is reduced.

A sensor comprises a housing; and a lead frame comprising at least three elongated leads having an exterior portion extending from the housing; and a magnetic sensor circuit disposed in the housing, and connected to the lead frame. The housing comprises two recesses arranged on two opposite sides of the housing for allowing the sensor to be mounted to a support. The lead frame may further comprise a plurality of tabs disposed between the elongated leads, for use as test pins. A component assembly comprising said sensor mounted on a support between deformable protrusions. A method of making said component assembly, comprising the step of positioning said component on the support between said protrusions, and deforming said protrusions such that they are at least partially disposed within the recesses.