Various circuit boards with mounted passive components and method of making the same are disclosed. In one aspect, a method of manufacturing is provided that includes at least partially encapsulating a first plurality of passive components in a molding material to create a first molded passive component group. The first molded passive component group is mounted on a surface of a circuit board. The first plurality of passive components are electrically connected to the circuit board.

A component includes a plurality of electrical connections on a process side opposed to a back side of the component. Each electrical connection includes an electrically conductive multi-layer connection post protruding from the process side. A printed structure includes a destination substrate and one or more components. The destination substrate has two or more electrical contacts and each connection post is in contact with, extends into, or extends through an electrical contact of the destination substrate to electrically connect the electrical contacts to the connection posts. The connection posts or electrical contacts are deformed. Two or more connection posts can be electrically connected to a common electrical contact.

An electronic card includes a substrate, an electronic device bonded to the substrate via a solder bump, and configured to include a first ceiling, and a cover fixed to the substrate, provided over the electronic device, and configured to include a second ceiling that faces the first ceiling, wherein the first ceiling or the second ceiling is provided with an annular member extending in a facing direction of the first ceiling and the second ceiling, the annular member forming an annular shape along a circumferential direction of the first ceiling, wherein the first ceiling and the second ceiling form a gap between the first ceiling and the second ceiling filled with a filling material inside the annular member, and wherein the second ceiling includes a through hole at a position that overlaps the filling material when viewed in a plan view of the second ceiling.

A component carrier includes a stack with at least one electrically conductive layer structure, at least one electrically insulating layer structure, a cavity delimited at a bottom side at least partially by a top side of a stepped metal structure of the at least one electrically conductive layer structure, and a component embedded in the cavity and arranged on the stepped metal structure. A bottom side of the stepped metal structure has a flat surface extending continuously along at least one horizontal direction.

A method of manufacturing an ultrasound imaging device involves forming an interposer structure, including forming a first metal material within openings through a substate and on top and bottom surfaces of the substrate, patterning the first metal material, forming a dielectric layer over the patterned first metal material, forming openings within the dielectric layer to expose portions of the patterned first metal material, filling the openings with a second metal material, forming a third metal material on the top and bottom surfaces of the substrate, and patterning the third metal material. The method further involves forming a packaging structure for an ultrasound-on-chip device, including attaching a multi-layer flex substrate to a carrier wafer, bonding a first side of an ultrasound-on-chip device to the multi-layer flex substrate, bonding a second side of the ultrasound-on-chip device to a first side of the interposer structure, and removing the carrier wafer.

Disclosed are a circuit board and its preparation method. The circuit board includes a base layer, a transmission wire layer including multiple conductor tabs, and an insulating and thermally conductive layer including multiple thermally conductive portions. A gap is defined between each adjacent two of the multiple conductor tabs to expose at least a portion of the base layer, and the gap is filled with a corresponding thermally conductive portion. A height of the thermally conductive portion is larger than heights of each adjacent two of the multiple conductor tabs to define a connection groove. The circuit board the disclosure providing enhances heat dissipation performance of circuit boards.

A welding quality processing method and device, and a circuit board. The method includes: obtaining warpage data of each circuit board layer in a multi-layer circuit board under a preset welding temperature change curve; performing simulation according to a stacked state of the multi-layer circuit board and the warpage data to generate a warpage level of each region in the multi-layer circuit board in the stacked state; and processing the multi-layer circuit board according to the warpage level.

A semiconductor assembly is described that includes a substrate having top and bottom sides. An integrated circuit die coupled to the substrate includes first and second distinct sets of ground pads. In some embodiments, the first and second sets of ground pads are configured to have distinct ground return paths to a host system. In further embodiments, one of the ground return paths may include a metal plate coupled between ground contacts on the top side of the substrate and ground contacts on a printed circuit board of the host system.

A wiring module according to an embodiment of the present technology includes: a wiring board and a heat dissipation member. The wiring board includes a body portion and one or more heat dissipation vias, the body portion including a front surface layer to which a device package is connected and a rear surface layer opposite to the front surface layer, the one or more heat dissipation vias penetrating the body portion from the front surface layer to the rear surface layer. The heat dissipation member is connected to the rear surface layer so as to thermally bond with the one or more heat dissipation vias.

An example of a method of making a printed structure comprises providing a destination substrate, contact pads disposed on the destination substrate, and a layer of adhesive disposed on the destination substrate. A stamp with a component adhered to the stamp is provided. The component comprises a stamp side in contact with the stamp and a post side opposite the stamp side, a circuit, and connection posts extending from the post side. Each of the connection posts is electrically connected to the circuit. The component is pressed into contact with the adhesive layer to adhere the component to the destination substrate and to form a printed structure having a volume defined between the component and the destination substrate. The stamp is removed and the printed structure is processed to fill or reduce the volume.