Patent classifications
H01L21/02197
MATERIAL DEPOSITION METHOD
A material deposition method comprising: preparing a precursor solution of Pb(Zr.sub.x,Ti.sub.1-x)O.sub.3 using 1-methoxy-2-propanol as a solvent and acetylacetone as a modifier; and forming a seed layer for a electroactive film by spin coating the precursor solution on a substrate. The electroactive film can be PZT, PZO or BFO, spin-coated or inkjet printed on the seed layer. Experience shows pure orientation for the piezoelectric film thanks to the use of 1-methoxy-2-propanol when preparing the seed layer. This orientation is attributed to the formation of nano crystals on the seed layer constituting a pre-crystallization.
DRAM INTERCONNECT STRUCTURE HAVING FERROELECTRIC CAPACITORS EXHIBITING NEGATIVE CAPACITANCE
An interconnect structure for use in coupling transistors in an integrated circuit is disclosed, including various configurations in which ferroelectric capacitors exhibiting negative capacitance are coupled in series with dielectric capacitors. In one embodiment, the negative capacitor includes a dielectric/ferroelectric bi-layer. When a negative capacitor is electrically coupled in series with a conventional dielectric capacitor, the series combination behaves like a stable ferroelectric capacitor for which the overall capacitance can be measured experimentally, and tuned to a desired value. The composite capacitance of a dielectric capacitor and a ferroelectric capacitor having negative capacitance coupled in series is, in theory, infinite, and in practice, very large. A series combination of positive and negative capacitors within a microelectronic interconnect structure can be used to make high capacity DRAM memory cells.
MXene layers as substrates for growth of highly oriented perovskite thin films
The present disclosure is directed to using MXene compositions as templates for the deposition of oriented perovskite films, and compositions derived from such methods. Certain specific embodiments include methods preparing an oriented perovskite, perovskite-type, or perovskite-like film, the methods comprising: (a) depositing at least one perovskite, perovskite-type, or perovskite-like composition or precursor composition using chemical vapor deposition (CVD), physical vapor deposition (PVD), or atomic layer deposition (ALD) onto a film or layer of a MXene composition supported on a substrate to form a layered composition or precursor composition; and either (b) (1) heat treating or annealing the layered precursor composition to form a layered perovskite-type structure comprising at least one oriented perovskite, perovskite-type, or perovskite-like composition; or (2) annealing the layered composition; or (3) both (1) and (2).
Capacitor including perovskite material, semiconductor device including the capacitor, and method of manufacturing the capacitor
A capacitor includes a lower electrode, a first dielectric layer provided on the lower electrode including a perovskite structure, an upper electrode including a perovskite structure, a first dielectric layer between provided on the lower electrode and the upper electrode; and a second dielectric layer, having a band gap energy greater than that of the first dielectric layer, provided between on the first dielectric layer and the upper electrode, the capacitor may have a low leakage current density and stable crystallinity, thereby suppressing a decrease in a dielectric constant.
Common mode compensation for 2T1C non-linear polar material based memory bit-cell
To compensate switching of a dielectric component of a non-linear polar material based capacitor, an explicit dielectric capacitor is added to a memory bit-cell and controlled by a signal opposite to the signal driven on a plate-line.
Stack of non-planar capacitors including capacitors with non-linear polar material and linear dielectric for common mode compensation in a memory bit-cell
To compensate switching of a dielectric component of a non-linear polar material based capacitor, an explicit dielectric capacitor is added to a memory bit-cell and controlled by a signal opposite to the signal driven on a plate-line.
Method of forming a stack of non-planar capacitors including capacitors with non-linear polar material and linear dielectric for common mode compensation in a memory bit-cell
To compensate switching of a dielectric component of a non-linear polar material based capacitor, an explicit dielectric capacitor is added to a memory bit-cell and controlled by a signal opposite to the signal driven on a plate-line.
HIGH-DENSITY LOW VOLTAGE NON-VOLATILE MEMORY WITH UNIDIRECTIONAL PLATE-LINE AND BIT-LINE AND PILLAR CAPACITOR
Described is a low power, high-density a 1T-1C (one transistor and one capacitor) memory bit-cell, wherein the capacitor comprises a pillar structure having ferroelectric material (perovskite, improper ferroelectric, or hexagonal ferroelectric) and conductive oxides as electrodes. In various embodiments, one layer of the conductive oxide electrode wraps around the pillar capacitor, and forms the outer electrode of the pillar capacitor. The core of the pillar capacitor can take various forms.
SEMICONDUCTOR DEVICE
There is provided a semiconductor device capable of improving the performance and/or reliability of the element, by increasing the capacitance of the capacitor, using a capacitor dielectric film including a ferroelectric material and a paraelectric material. The semiconductor device includes first and second electrodes disposed to be spaced apart from each other, and a capacitor dielectric film disposed between the first electrode and the second electrode and including a first dielectric film and a second dielectric film. The first dielectric film includes one of a first monometal oxide film and a first bimetal oxide film, the first dielectric film has an orthorhombic crystal system, the second dielectric film includes a paraelectric material, and a dielectric constant of the capacitor dielectric film is greater than a dielectric constant of the second dielectric film.
Method of forming a stack of planar capacitors including capacitors with non-linear polar material and linear dielectric for common mode compensation in a memory bit-cell
To compensate switching of a dielectric component of a non-linear polar material based capacitor, an explicit dielectric capacitor is added to a memory bit-cell and controlled by a signal opposite to the signal driven on a plate-line.