Patent classifications
H01L21/02233
TRENCH-GATE TRANSISTOR WITH GATE DIELECTRIC HAVING A FIRST THICKNESS BETWEEN THE GATE ELECTRODE AND THE CHANNEL REGION AND A SECOND GREATER THICKNESS BETWEEN THE GATE ELECTRODE AND THE SOURCE/DRAIN REGIONS
The present disclosure provides a transistor, a transistor forming method thereof, and a semiconductor device. The transistor forming method comprises providing a substrate, the substrate comprising a first region for forming a source region and a second region for forming a drain region; forming a gate groove in the substrate to separate the first region and the second region, a part of the substrate along the bottom of the gate groove being used for constituting an embedded channel region of a transistor; forming a gate dielectric layer on the gate groove of the substrate to cover the embedded channel region and to extend to cover a side of the first region and a side of the second region in the gate groove; and forming a gate conductive layer on the gate dielectric layer of the substrate and in the gate groove.
FABRICATION PROCESS OF VERTICAL-CHANNEL, SILICON, FIELD-EFFECT TRANSISTORS
A method of fabricating transistors with a vertical gate in trenches includes lithographing to form wide trenches; forming dielectric in the trenches and filling the trenches with flowable material; and lithography to form narrow trenches within the wide trenches thereby exposing well or substrate before epitaxially growing semiconductor strips atop substrate exposed by the narrow trenches; removing the flowable material; growing gate oxide on the semiconductor strip; forming gate conductor over the gate oxide and into gaps between the epitaxially-grown semiconductor strips and the dielectric; masking and etching the gate conductor; and implanting source and drain regions. The transistors formed have semiconductor strips extending from a source region to a drain region, the semiconductor strips within trenches, the trench walls insulated with a dielectric, a gate oxide formed on both vertical walls of the semiconductor strip; and gate material between the dielectric and gate oxide.
Semiconductor device and method
In an embodiment, a method includes: forming a fin extending from a substrate, the fin having a first width and a first height after the forming; forming a dummy gate stack over a channel region of the fin; growing an epitaxial source/drain in the fin adjacent the channel region; and after growing the epitaxial source/drain, replacing the dummy gate stack with a metal gate stack, the channel region of the fin having the first width and the first height before the replacing, the channel region of the fin having a second width and a second height after the replacing, the second width being less than the first width, the second height being less than the first height.
Method for forming semiconductor layers
A second semiconductor layer is oxidized through a groove and a fourth semiconductor layer is oxidized, a first oxide layer is formed, and a second oxide layer is formed. By oxidizing the entire second semiconductor layer and the fourth semiconductor layer, the first oxide layer and the second oxide layer in an amorphous state are formed.
EMITTER OXIDATION UNIFORMITY WITHIN A WAFER
A wafer may comprise a substrate layer and a plurality of vertical cavity surface emitting lasers (VCSELs) formed on or within the substrate layer. A respective trench-to-trench distance associated with the plurality of VCSELs may vary across the wafer based on a predicted variation of an oxidation rate of an oxidation layer across the wafer.
Conformal oxidation processes for 3D NAND
Embodiments described herein generally relate to conformal oxidation processes for flash memory devices. In conventional oxidation processes for gate structures, growth rates have become too fast, ultimately creating non-conformal films. To create a preferred growth rate for SiO.sub.2 on SiN.sub.x films, embodiments in this disclosure use a thermal combustion of a ternary mixture of H.sub.2+O.sub.2+N.sub.2O to gain SiO.sub.2 out of Si containing compounds. Using this mixture provides a lower growth in comparison with using only H.sub.2 and O.sub.2, resulting in a lower sticking coefficient. The lower sticking coefficient allows an optimal amount of atoms to reach the bottom of the gate, improving the conformality in 3D NAND SiO.sub.2 oxidation layers, specifically for ONO replacement tunneling gate formation.
METHOD OF PROCESSING SUBSTRATE, METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE, RECORDING MEDIUM, AND SUBSTRATE PROCESSING APPARATUS
Provided is a technique including: (a) a step of forming a laminated film formed by laminating a first film containing nitrogen, oxygen, and a predetermined element and a second film containing nitrogen and having a composition different from that of the first film on a substrate in a processing container; and (b) modifying the first film and the second film adhering to an inside of the processing container in (a) to bring the composition of the second film close to the composition of the first film.
SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME
A method of making a semiconductor device can include: etching a substrate to form a trench in the substrate; filling the trench with an insulating material layer, wherein a top surface of the insulating material layer is higher than a top surface of the trench; etching the insulating material layer to form a side groove between the insulating material layer and a top side wall of the trench to expose a corner at a top of the trench; and forming a field oxide layer on a top surface of the substrate by an oxidation process, wherein the corner at the top of the trench is correspondingly oxidized to form into a round corner by the oxidation process.
System and method for performing depth-dependent oxidation modeling in a virtual fabrication environment
Systems and methods for performing depth-dependent oxidation modeling and depth-dependent etch modeling in a virtual fabrication environment are discussed. More particularly, a virtual fabrication environment models, as part of a process sequence, oxidant dispersion in a depth-dependent manner and simulates the subsequent oxidation reaction based on the determined oxidant thickness along an air/silicon interface. Further the virtual fabrication environment performs depth-dependent etch modeling as part of a process sequence to determine etchant concentration and simulate the etching of material along an air/material interface.
METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE, SUBSTRATE PROCESSING APPARATUS, AND RECORDING MEDIUM
There is provided a technique that includes: forming a first film to have a first predetermined film thickness over a substrate by performing a first cycle a first predetermined number of times, the first cycle including non-simultaneously performing: (a1) forming an oxynitride film by supplying a first film-forming gas to the substrate; and (a2) changing the oxynitride film into a first oxide film by supplying a first oxidizing gas to the substrate to oxidize the oxynitride film.