H01L21/02233

THIN FILM TRANSISTOR INCLUDING A COMPOSITIONALLY-GRADED GATE DIELECTRIC AND METHODS FOR FORMING THE SAME

A thin film transistor may be manufactured by forming a gate electrode in an insulating layer over a substrate, forming a gate dielectric over the gate electrode and the insulating layer, forming an active layer over the gate electrode, and forming a source electrode and a drain electrode contacting a respective portion of a top surface of the active layer. A surface oxygen concentration may be increased in at least one of the gate dielectric and the active layer by introducing oxygen atoms into a surface region of a respective one of the gate dielectric and the active layer.

Method of processing substrate, substrate processing apparatus, recording medium, method of manufacturing semiconductor device

There is provided a technique that includes: forming a first film to have a first predetermined film thickness over a substrate by performing a first cycle a first predetermined number of times, the first cycle including non-simultaneously performing: (a1) forming an oxynitride film by supplying a first film-forming gas to the substrate; and (a2) changing the oxynitride film into a first oxide film by supplying a first oxidizing gas to the substrate to oxidize the oxynitride film.

Trench-gate transistor with gate dielectric having a first thickness between the gate electrode and the channel region and a second greater thickness between the gate electrode and the source/drain regions
11404551 · 2022-08-02 · ·

The present disclosure provides a transistor, a transistor forming method thereof, and a semiconductor device. The transistor forming method comprises providing a substrate, the substrate comprising a first region for forming a source region and a second region for forming a drain region; forming a gate groove in the substrate to separate the first region and the second region, a part of the substrate along the bottom of the gate groove being used for constituting an embedded channel region of a transistor; forming a gate dielectric layer on the gate groove of the substrate to cover the embedded channel region and to extend to cover a side of the first region and a side of the second region in the gate groove; and forming a gate conductive layer on the gate dielectric layer of the substrate and in the gate groove.

DC bias in plasma process

Embodiments described herein relate to plasma processes. A plasma process includes generating a plasma containing negatively charged oxygen ions. A substrate is exposed to the plasma. The substrate is disposed on a pedestal while being exposed to the plasma. While exposing the substrate to the plasma, a negative direct current (DC) bias voltage is applied to the pedestal to repel the negatively charged oxygen ions from the substrate.

THIN FILM TRANSISTOR INCLUDING A COMPOSITIONALLY-GRADED GATE DIELECTRIC AND METHODS FOR FORMING THE SAME

A thin film transistor may be manufactured by forming a gate electrode in an insulating layer over a substrate, forming a gate dielectric over the gate electrode and the insulating layer, forming an active layer over the gate electrode, and forming a source electrode and a drain electrode contacting a respective portion of a top surface of the active layer. A surface oxygen concentration may be increased in at least one of the gate dielectric and the active layer by introducing oxygen atoms into a surface region of a respective one of the gate dielectric and the active layer.

Method for manufacturing semiconductor device

A method for manufacturing a semiconductor device includes forming a trench in a semiconductor wafer; and forming a first insulating film by thermally oxidizing the semiconductor wafer. The first insulating film covers an inner surface of the trench so that a first space remains in the trench. The first insulating film has a recessed portion at the bottom of the trench. The method further includes forming a semiconductor layer on the first insulating film, the semiconductor layer filling the first space and the recessed portion; forming a second space in the trench by selectively removing the semiconductor layer so that a portion of the semiconductor layer remains in the recessed portion; forming a second insulating film in the recessed portion by thermally oxidizing the portion of the semiconductor layer; and forming a first conductive body in the trench, the first conductive body filling the second space.

Systems and methods for performing depth-dependent oxidation modeling and depth-dependent etch modeling in a virtual fabrication environment

Systems and methods for performing depth-dependent oxidation modeling and depth-dependent etch modeling in a virtual fabrication environment are discussed. More particularly, a virtual fabrication environment models, as part of a process sequence, oxidant dispersion in a depth-dependent manner and simulates the subsequent oxidation reaction based on the determined oxidant thickness along an air/silicon interface. Further the virtual fabrication environment performs depth-dependent etch modeling as part of a process sequence to determine etchant concentration and simulate the etching of material along an air/material interface.

SUBSTRATE PROCESSING METHOD AND SUBSTRATE PROCESSING APPARATUS
20230395368 · 2023-12-07 ·

A substrate processing method includes preparing a substrate having a target film including silicon, carbon, and nitrogen on a surface of the substrate; supplying hydrogen gas and oxygen gas to the target film to oxidize a surface layer of the target film and form an oxide film; and etching the oxide film.

Emitter oxidation uniformity within a wafer

A wafer may comprise a substrate layer and a plurality of vertical cavity surface emitting lasers (VCSELs) formed on or within the substrate layer. A respective trench-to-trench distance associated with the plurality of VCSELs may vary across the wafer based on a predicted variation of an oxidation rate of an oxidation layer across the wafer.

METHOD FOR PROCESSING SEMICONDUCTOR STRUCTURE
20210335594 · 2021-10-28 ·

The present disclosure relates to the field of semiconductor fabrication technology, and in particular to a method for processing a semiconductor structure, including the following steps: providing a semiconductor structure, the semiconductor structure including a substrate and a plurality of etched structures positioned on the surface region of the substrate; forming a transition layer at least covering the inner walls of the etched structures, the transition layer being configured to reduce a capillary force exerted by a fluid on the etched structures and to serve as a sacrificial layer configured to repair a collapsed structure; drying the semiconductor structure; and removing the transition layer. According to the method provided by the present disclosure, the probability of the collapse or deformation of the etched structures during a cleaning process is reduced, the performance of the semiconductor structure is improved, and the productivity and the yield of the semiconductor devices are increased.