An ink jet process is used to deposit a material layer to a desired thickness. Layout data is converted to per-cell grayscale values, each representing ink volume to be locally delivered. The grayscale values are used to generate a halftone pattern to deliver variable ink volume (and thickness) to the substrate. The halftoning provides for a relatively continuous layer (e.g., without unintended gaps or holes) while providing for variable volume and, thus, contributes to variable ink/material buildup to achieve desired thickness. The ink is jetted as liquid or aerosol that suspends material used to form the material layer, for example, an organic material used to form an encapsulation layer for a flat panel device. The deposited layer is then cured or otherwise finished to complete the process.

An integrated circuit (IC) with an impedance sensor fabricated on a surface of the substrate is disclosed. The impedance sensor includes a bottom conductive plate formed on the substrate. A sensing membrane is formed on the bottom conductive plate. A top conductive plate is formed on the sensing membrane, in which the top conductive plate is a fusion of conductive nanoparticles having a random three dimensional porosity that is permeable to a reagent.

Provided is a fabricating method of a pattern, which includes preparing a first substrate having a first width and a first thickness, stretching the first substrate and preparing a second substrate having a second width and a second thickness, forming a base layer made of a material of a pattern which will be formed on the second substrate, removing a predetermined region of the base layer and forming a first pattern having a first line width and a first height on the second substrate, and removing a tensile force applied to the second substrate to restore the second substrate back to being the first substrate and forming a second pattern having a second line width and a second height on the first substrate. Fineness of a line width can be achieved by forming the first pattern in a state in which the substrate is stretched, contracting a line width of the first pattern while restoring the stretched substrate, and forming the second pattern having a contracted line width on the restored substrate such that high integration can be achieved.

An electronic component such as a voltage controllable reconfigurable capacitor or transistor is formed by printing one or more layers of ink on a non-conductive substrate. Ferroelectric ink or semi-conductive ink is printed and conductive resistive or dielectric ink is printed on a s same or different layers. Reconfigurability is achieved by printing resistive biasing circuitry wherein when a changing voltage is applied to the biasing circuitry, an electronic property of the electronic component changes in response to the changing voltage.

Embodiments disclosed herein include electronic packages. In an embodiment, the electronic package comprises a first package, wherein the first package comprises, a first package substrate, a first die over the first package substrate, a first mold layer over the first package substrate and around the first die, and a plurality of through mold interconnects (TMIs) through the first mold layer. The electronic package may further comprise a second package electrically coupled the first package by the TMIs, wherein the second package comprises a second package substrate, a second die over the second package substrate, and a solder resist over a surface of the second package substrate opposite from the second die. In an embodiment, the electronic package may also comprise a barrier between the first package and the second package.

A laminate by using a paste or solution containing aliphatic polycarbonates having an etching mask function is provided. A method of producing a laminate of the present invention includes a pattern forming step of forming a pattern 80 of a first oxide precursor layer in which a compound of metal to be oxidized into a metal oxide is dispersed in a solution containing a binder (possibly including inevitable impurities) made of aliphatic polycarbonates on an oxide layer 44 or on the second oxide precursor layer to be oxidized into the oxide layer 44; an etching step of, after the pattern forming step, etching the oxide layer 44 or the second oxide precursor layer that is not protected by the pattern 80; and a heating step of, after the etching step, heating the oxide layer 44 or the second oxide precursor layer, and the first oxide precursor layer to a temperature at which the binder is decomposed or higher.

Disclosed is a radiation curable polymer formulation and methods of producing a dielectric film having such a formulation. The radiation curable polymer formulation includes an acrylic monomer; a cross linking agent; and a photoinitiator. The polymer formulation is insoluble with an organic solvent, which is preferable in low cost high volume manufacturing of thin film transistors for flexible electronics.

A lithographic printing plate precursor including an image recording layer containing an infrared absorber represented by Formula I, on a support, and a method of producing a lithographic printing plate and a lithographic printing method using the lithographic printing plate precursor.

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The present invention relates to a method for forming a layer, to be patterned, of an element by using a fluorinated material, which has orthogonality, and a solvent, the method comprising: a first step of printing with the fluorinated material so as to form, on a surface of a substrate, a mask template provided with an exposure part and a non-exposure part; a second step of coating the exposure part with a material to be patterned; a the third step of lifting-off the non-exposure part with the fluorinated solvent so as to form the layer to be patterned in the exposure part.

In a described example, a wireless communication device includes an antenna substrate having an antenna on an antenna side surface; a semiconductor die on an device side surface of the antenna substrate, opposite the antenna side surface; and an antenna protection layer covering the antenna and a portion of the antenna side surface of the antenna substrate having a uniform predetermined thickness across the antenna side surface of the antenna substrate within +/10%.