A microelectronic device is formed by forming at least a portion of a substrate of the microelectronic device by one or more additive processes. The additive processes may be used to form semiconductor material of the substrate. The additive processes may also be used to form dielectric material structures or electrically conductive structures, such as metal structures, of the substrate. The additive processes are used to form structures of the substrate which would be costly or impractical to form using planar processes. In one aspect, the substrate may include multiple doped semiconductor elements, such as wells or buried layers, having different average doping densities, or depths below a component surface of the substrate. In another aspect, the substrate may include dielectric isolation structures with semiconductor material extending at least partway over and under the dielectric isolation structures. Other structures of the substrate are disclosed.

An organic EL display device including a plurality of pixels includes an element substrate including a substrate, and a plurality of organic EL elements supported by the substrate and respectively located in the plurality of pixels; and a thin film encapsulation structure covering the plurality of pixels. The thin film encapsulation structure includes a first inorganic barrier layer, an organic barrier layer in contact with a top surface of the first inorganic barrier layer, the organic barrier layer including a plurality of solid portions distributed discretely, and a second inorganic barrier layer in contact with the top surface of the first inorganic barrier layer and top surfaces of the plurality of solid portions of the organic barrier layer. The organic barrier layer is black.

In a described example, a packaged semiconductor device includes: a semiconductor die with a component proximate to a surface of the semiconductor die; the semiconductor die mounted on a substrate. The component is covered with a first polymer layer with a first modulus and at least a portion of the first polymer layer is covered by at least one second polymer layer with a second modulus and the second modulus is greater than the first modulus. The semiconductor die and a portion of the substrate are covered with mold compound.

Embodiments disclosed herein include electronic packages. In an embodiment, the electronic package comprises a first package, wherein the first package comprises, a first package substrate, a first die over the first package substrate, a first mold layer over the first package substrate and around the first die, and a plurality of through mold interconnects (TMIs) through the first mold layer. The electronic package may further comprise a second package electrically coupled the first package by the TMIs, wherein the second package comprises a second package substrate, a second die over the second package substrate, and a solder resist over a surface of the second package substrate opposite from the second die. In an embodiment, the electronic package may also comprise a barrier between the first package and the second package.

An organic EL display device including a plurality of pixels includes an element substrate including a substrate, and a plurality of organic EL elements supported by the substrate and respectively located in the plurality of pixels; and a thin film encapsulation structure covering the plurality of pixels. The thin film encapsulation structure includes a first inorganic barrier layer, an organic barrier layer in contact with a top surface of the first inorganic barrier layer, the organic barrier layer including a plurality of solid portions distributed discretely, and a second inorganic barrier layer in contact with the top surface of the first inorganic barrier layer and top surfaces of the plurality of solid portions of the organic barrier layer. The organic barrier layer is black.

In one aspect of the disclosure, a semiconductor package is disclosed. The semiconductor package includes a lead frame. A semiconductor die is attached to a first side of the lead frame. A protective shell covers at least a first portion of the first surface of the semiconductor die. The protective shell comprises of ink residue. A layer of molding compound covers an outer surface of the protective shell and exposed portion of the first surface of the semiconductor die. A cavity space is within an inner space of the protective shell and the first portion of the top surface of the semiconductor die.

Provided is a fabricating method of a pattern, which includes preparing a first substrate having a first width and a first thickness, stretching the first substrate and preparing a second substrate having a second width and a second thickness, forming a base layer made of a material of a pattern which will be formed on the second substrate, removing a predetermined region of the base layer and forming a first pattern having a first line width and a first height on the second substrate, and removing a tensile force applied to the second substrate to restore the second substrate back to being the first substrate and forming a second pattern having a second line width and a second height on the first substrate. Fineness of a line width can be achieved by forming the first pattern in a state in which the substrate is stretched, contracting a line width of the first pattern while restoring the stretched substrate, and forming the second pattern having a contracted line width on the restored substrate such that high integration can be achieved.

A system and method comprising depositing a first layer on a substrate, in which the first layer comprises at least one of, a metal oxide and carbon based derivative, wherein the first layer is a gate electrode of a tag. Depositing a second layer, annealing said second layer, and treating a surface of the second layer, wherein the surface treatment is configured to enhance conductivity. Depositing a third layer, wherein the third layer is a gate dielectric of the tag. Depositing a fourth and a fifth layer. The fifth layer comprises at least an Indium Gallium Zinc Oxide layer and as a semiconductor layer of the tag. Photonic curing the fifth layer. Depositing a sixth and a seventh layer, in which the sixth layer is a source contact layer and said seventh layer is a drain contact layer of the tag.

An ink jet process is used to deposit a material layer to a desired thickness. Layout data is converted to per-cell grayscale values, each representing ink volume to be locally delivered. The grayscale values are used to generate a halftone pattern to deliver variable ink volume (and thickness) to the substrate. The halftoning provides for a relatively continuous layer (e.g., without unintended gaps or holes) while providing for variable volume and, thus, contributes to variable ink/material buildup to achieve desired thickness. The ink is jetted as liquid or aerosol that suspends material used to form the material layer, for example, an organic material used to form an encapsulation layer for a flat panel device. The deposited layer is then cured or otherwise finished to complete the process.

An organic EL display device (100) including a plurality of pixels includes an element substrate (1) including a substrate, and a plurality of organic EL elements supported by the substrate and respectively located in the plurality of pixels; and a thin film encapsulation structure (10) covering the plurality of pixels. The thin film encapsulation structure includes a first inorganic barrier layer (12), an organic barrier layer (14) in contact with a top surface of the first inorganic barrier layer (12), the organic barrier layer (14) including a plurality of solid portions distributed discretely, and a second inorganic barrier layer (16) in contact with the top surface of the first inorganic barrier layer (12) and top surfaces of the plurality of solid portions of the organic barrier layer (14). The organic barrier layer (14) is black.