Embodiments provide a way of treating source/drain recesses with a high heat treatment and an optional hydrogen plasma treatment. The high heat treatment smooths the surfaces inside the recesses and remove oxides and etching byproducts. The hydrogen plasma treatment enlarges the recesses vertically and horizontally and inhibits further oxidation of the surfaces in the recesses.

The disclosure is directed towards semiconductor devices and methods of manufacturing the semiconductor devices. The methods include forming fins in a device region and forming other fins in a multilayer stack of semiconductor materials in a multi-channel device region. A topmost nanostructure may be exposed in the multi-channel device region by removing a sacrificial layer from the top of the multilayer stack. Once removed, a stack of nanostructures are formed from the multilayer stack. A native oxide layer is formed to a first thickness over the topmost nanostructure and to a second thickness over the remaining nanostructures of the stack, the first thickness being greater than the second thickness. A gate dielectric is formed over the fins in the device region. A gate electrode is formed over the gate dielectric in the device region and surrounding the native oxide layer in the multi-channel device region.

A method for conditioning a plasma processing chamber including a chuck is provided. The method comprises a plurality of cycles, wherein each cycle comprises cleaning an interior of the plasma processing chamber and the chuck and forming a silicon oxide based coating on the interior of the plasma processing chamber and the chuck. The silicon oxide based coating has a first layer and a second layer.

Implementations of the present disclosure generally relates to a transfer chamber coupled to at least one vapor phase epitaxy chamber a plasma oxide removal chamber coupled to the transfer chamber, the plasma oxide removal chamber comprising a lid assembly with a mixing chamber and a gas distributor; a first gas inlet formed through a portion of the lid assembly and in fluid communication with the mixing chamber; a second gas inlet formed through a portion of the lid assembly and in fluid communication with the mixing chamber; a third gas inlet formed through a portion of the lid assembly and in fluid communication with the mixing chamber; and a substrate support with a substrate supporting surface; a lift member disposed in a recess of the substrate supporting surface and coupled through the substrate support to a lift actuator; and a load lock chamber coupled to the transfer chamber.

Processes for selective deposition of material on a workpiece are provided. In one example, the method includes placing a workpiece on a workpiece support in a processing chamber. The workpiece has a first material and a second material. The second material is different from the first material. The method includes performing an organic radical based surface treatment process on the workpiece to modify an adsorption characteristic of the first material selectively relative to the second material such that the first material has a first adsorption characteristic and the second material has a second adsorption characteristic. The second adsorption characteristic being different from the first adsorption characteristic. The method includes performing a deposition process on the workpiece such that a material is selectively deposited on the first material relative to the second material.

Semiconductor devices, integrated circuits and methods of forming the same are provided. In one embodiment, a method includes depositing a first dielectric layer over a metal pad disposed over a workpiece, forming a first opening in the first dielectric layer to expose a portion of the metal pad, after the forming of the first opening, forming a second dielectric layer over the exposed portion of the metal pad, depositing a first polymeric material over the second dielectric layer, forming a second opening through the first polymeric material and the second dielectric layer to expose the metal pad, and forming a bump feature over the exposed metal pad.

Exemplary etching methods may include flowing an oxygen-containing precursor into a processing region of a semiconductor processing chamber. The methods may include contacting a substrate housed in the processing region with the oxygen-containing precursor. The substrate may include an exposed region of ruthenium, and the contacting may produce ruthenium tetroxide. The methods may include vaporizing the ruthenium tetroxide from a surface of the exposed region of ruthenium. An amount of oxidized ruthenium may remain. The methods may include contacting the oxidized ruthenium with a hydrogen-containing precursor. The methods may include removing the oxidized ruthenium.

Implementations described herein generally relate to a method for forming a metal layer and to a method for forming an oxide layer on the metal layer. In one implementation, the metal layer is formed on a seed layer, and the seed layer helps the metal in the metal layer nucleate with small grain size without affecting the conductivity of the metal layer. The metal layer may be formed using plasma enhanced chemical vapor deposition (PECVD) and nitrogen gas may be flowed into the processing chamber along with the precursor gases. In another implementation, a barrier layer is formed on the metal layer in order to prevent the metal layer from being oxidized during subsequent oxide layer deposition process. In another implementation, the metal layer is treated prior to the deposition of the oxide layer in order to prevent the metal layer from being oxidized.

A method of manufacturing a semiconductor device is provided. The method includes providing a first layer having a first surface and a second layer having a second surface orthogonal to the first surface in a vertical direction, forming an inhibitor layer conformally on the first surface and the second surface, exposing the second surface by selectively removing the inhibitor layer on the second surface among the first surface and the second surface, the exposing of the second surface may include selectively removing an edge portion of the inhibitor layer on the first surface, the edge portion contacting the second surface, and forming an interest layer on the exposed second surface.

Methods for selective deposition are provided. Material is selectively deposited on a first surface of a substrate relative to a second surface of a different material composition. An inhibitor, such as a polyimide layer, is selectively formed from vapor phase reactants on the first surface relative to the second surface. A layer of interest is selectively deposited from vapor phase reactants on the second surface relative to the first surface. The first surface can be metallic while the second surface is dielectric. Accordingly, material, such as a dielectric transition metal oxides and nitrides, can be selectively deposited on metallic surfaces relative dielectric surfaces using techniques described herein.