H01L21/02381

Method of preparing an isolation region in a high resistivity silicon-on-insulator substrate

A multilayer composite structure and a method of preparing a multilayer composite structure are provided. The multilayer composite structure comprises a semiconductor handle substrate having a minimum bulk region resistivity of at least about 500 ohm-cm and an isolation region that impedes the transfer of charge carriers along the surface of the handle substrate and reduces parasitic coupling between RF devices.

Crystalline semiconductor layer formed in BEOL processes

A crystalline channel layer of a semiconductor material is formed in a backend process over a crystalline dielectric seed layer. A crystalline magnesium oxide MgO is formed over an amorphous inter-layer dielectric layer. The crystalline MgO provides physical link to the formation of a crystalline semiconductor layer thereover.

Film forming method and film forming apparatus

A film forming method includes: forming a laminated film, in which an interface layer, a bulk layer, and a surface layer are laminated in this order, on a base; and crystallizing the laminated film, wherein the bulk layer is formed of a film that is easier to crystallize than the interface layer in crystallizing the laminated film, and wherein the surface layer is formed of a film that is easier to crystallize than the bulk layer in crystallizing the laminated film.

Susceptor, epitaxial growth apparatus, method of producing epitaxial silicon wafer, and epitaxial silicon wafer
11501996 · 2022-11-15 · ·

Provided is a susceptor which makes it possible to increase the circumferential flatness uniformity of an epitaxial layer of an epitaxial silicon wafer. A susceptor 100 is provided with a concave counterbore portion on which a silicon wafer W is placed, and the radial distance L between the center of the susceptor and an opening edge of the counterbore portion varies at 90° periods in the circumferential direction. Meanwhile, when the angle at which the radial distance L is minimum is 0°, the radial distance L is a minimum value L.sub.1 at 90°, 180°, and 270°; and the radial distance L is a maximum value L.sub.2 at 45°, 135°, 225°, and 315°. Accordingly, the pocket width L.sub.p also varies in conformance with the variations of the radial distance L. The opening edge 110C describes four elliptical arcs being convex radially outward when the susceptor 100 is viewed from above.

Method for providing a semiconductor device with silicon filled gaps

Method for filling a gap, comprising providing in a deposition chamber a semiconductor substrate having a gap, wherein a bottom of the gap includes a crystalline semiconducting material and wherein a side wall of the gap includes an amorphous material; depositing a silicon precursor in the gap.

LAYERED STRUCTURE
20220359668 · 2022-11-10 ·

A layered structure including a substrate in [100] crystal orientation, a crystalline bixbyite oxide layer in [111] orientation, and a metal-containing layer crystallographically matched to the crystalline bixbyite oxide layer. Advantageously a high quality metal-containing layer can be grown on a substrate, which is common across the industry and which opens integration and cost benefits.

Laser Fabrication of Lead Selenide Thin Film

A laser sintering deposition method for disposing lead selenide onto a substrate. The method includes: wet-milling a lead selenide ingot mixed with methanol into a colloidal slurry containing nanocrystals; separating the colloidal slurry into nanocrystal particles and the methanol; depositing the nanocrystal particles to a substrate; and emitting coherent infrared light onto the nanocrystal particles for fusing into a lead selenide crystalline film. Afterwards, the lead selenide film can be exposed to oxygen to form a lead selenite layer, and subsequently to iodine gas to produce a lead iodide layer onto the lead selenite layer.

NITRIDE SEMICONDUCTOR COMPONENT AND PROCESS FOR ITS PRODUCTION
20230041323 · 2023-02-09 · ·

A process for the production of a layer structure of a nitride semiconductor component on a silicon surface, comprising: provision of a substrate having a silicon surface; deposition of an aluminium-containing nitride nucleation layer on the silicon surface of the substrate; optional: deposition of an aluminium-containing nitride buffer layer on the nitride nucleation layer; deposition of a masking layer on the nitride nucleation layer or, if present, on the first nitride buffer layer; deposition of a gallium-containing first nitride semiconductor layer on the masking layer, wherein the masking layer is deposited in such a way that, in the deposition step of the first nitride semiconductor layer, initially separate crystallites grow that coalesce above a coalescence layer thickness and occupy an average surface area of at least 0.16 μm.sup.2 in a layer plane of the coalesced nitride semiconductor layer that is perpendicular to the growth direction.

Manufacturing method for semiconductor laminated film, and semiconductor laminated film

A method of producing a semiconductor laminate film includes forming a semiconductor layer containing silicon and germanium on a silicon substrate by a sputtering method. In the sputtering method, a film formation temperature of the semiconductor layer is less than 500° C., and a film formation pressure of the semiconductor layer ranges from 1 mTorr to 11 mTorr, or, a film formation temperature of the semiconductor layer is less than 600° C., and a film formation pressure of the semiconductor layer is equal to or more than 2 mTorr and less than 5 mTorr. The sputtering method uses a sputtering gas having a volume ratio of a hydrogen gas of less than 0.1%, and the semiconductor layer satisfies a relationship of t≤0.881×x.sup.−4.79, where t represents a thickness (nm) of the semiconductor layer, and x represents a ratio of the number of germanium atoms to a sum of the number of silicon atoms and the number of germanium atoms in the semiconductor layer.

Method of removing an etch mask

An embodiment method includes forming a patterned etch mask over a target layer and patterning the target layer using the patterned etch mask as a mask to form a patterned target layer. The method further includes performing a first cleaning process on the patterned etch mask and the patterned target layer, the first cleaning process including a first solution. The method additionally includes performing a second cleaning process to remove the patterned etch mask and form an exposed patterned target layer, the second cleaning process including a second solution. The method also includes performing a third cleaning process on the exposed patterned target layer, and performing a fourth cleaning process on the exposed patterned target layer, the fourth cleaning process comprising the first solution.