Provided are a conductive structure and a method of controlling a work function of metal. The conductive structure includes a conductive material layer including metal and a work function control layer for controlling a work function of the conductive structure by being bonded to the conductive material layer. The work function control layer includes a two-dimensional material with a defect.

A liquid crystal display device includes a TFT substrate having a first alignment film and an opposing substrate having a second alignment film with liquid crystals sandwiched therebetween. One of the first and second alignment films, comprises a first polyimide produced via polyamide acid ester containing cyclobutane as a precursor and a second polyimide produced via polyamide acid as a precursor. The polyamide acid has a higher polarity than that of the polyamide acid ester. The one of the first and second alignment films is responsive to photo-alignment. A first side of the one of the first and second alignment films is adjacent to the liquid crystals, and a second side thereof is closer to one of the TFT substrate and the counter substrate than the first side. The first side contains more of the first polyimide and less of the second polyimide than the second side.

Apparatus, systems, and methods for forming semiconductor materials (e.g., using nanofabrication) are generally described. In one example, a method comprises formation of a carbon buffer layer on a first substrate and a graphene layer on the carbon buffer layer by silicon sublimation, followed by removing the graphene layer so as to expose the carbon buffer layer and form a fabrication platform.

A semiconductor substrate (1) includes: an SiC single crystal substrate (10SB), a first graphene layer (11GR1) disposed on an Si plane of the SiC single crystal substrate 10SB; an SiC epitaxial growth layer (12RE) formed above the SiC single crystal substrate via the first graphene layer; and a second graphene layer (11GR2) disposed on an Si plane of the SiC epitaxial growth layer. There is also included an SiC polycrystalline substrate (16P) provisionally bonded onto the SiC epitaxial growth layer via the second graphene layer. The SiC single crystal substrate is able to be reused by being separated from the SiC epitaxial growth layer. This semiconductor substrate further includes an SiC polycrystalline growth layer (18PC) CVD grown on the C plane of the SiC epitaxial growth layer; and the SiC epitaxial growth layer is transferred to the SiC polycrystalline growth layer.

A method for manufacturing a semiconductor device and a semiconductor substrate are provided. A method for manufacturing a semiconductor device includes the steps of forming a bonding layer that bonds a semiconductor thin film to a bonding layer region on a portion of a first substrate with a force weaker than covalent bonding, forming the semiconductor thin film in the bonding layer region and a non-bonding layer region other than the bonding layer region, separating the semiconductor thin film from the first substrate by bonding an organic layer included in a pick-up substrate different from the first substrate to the semiconductor thin film, removing the bonding layer adhered to a peeled surface of the semiconductor thin film separated from the first substrate, and bonding the semiconductor thin film from which the bonding layer has been removed to a second substrate different from the first substrate.

Methods and systems for forming structures including a superlattice of silicon-containing epitaxial layers using nanoparticles. Exemplary methods can include forming nanoparticles in situ and depositing the nanoparticles onto a substrate surface to thereby form the epitaxial layers.

A semiconductor substrate (1) disclosed herein includes: an SiC single crystal substrate (10SB); a graphene layer (11GR) disposed on an Si plane of the SiC single crystal substrate (10SB); an SiC epitaxial growth layer (12RE) disposed above the SiC single crystal substrate (10SB) via the graphene layer (11GR); and a polycrystalline Si layer (15PS) disposed on an Si plane of the SiC epitaxial growth layer (12RE). The semiconductor substrate may include a graphite substrate or an silicon substrate disposed on a polycrystalline Si layer (15PS). The semiconductor substrate may further include an SiC polycrystalline growth layer (18PC) disposed on a C plane of the SiC epitaxial growth layer (12RE). Consequently, the present disclosure provides a low-cost and high-quality semiconductor substrate and a fabrication method thereof.

A semiconductor device has a substrate and graphene with semiconducting properties or diamond region formed on the substrate. The graphene with semiconducting properties or diamond region is formed on or within the substrate using liquid-phase-epitaxy growth of graphene enabled by a catalytic alloy of Ni and Cu. The substrate can be silicon, silicon carbide, gallium arsenide, gallium nitride, germanium, or indium phosphide. A semiconductor component is formed over the graphene with semiconducting properties or diamond region and substrate. The semiconductor component can be a power MOSFET, IGBT, or CTIGBT with a gate structure formed over the substrate, source region adjacent to the gate structure, and drain region adjacent to the gate structure opposite the source region. The graphene with semiconducting properties or diamond region is formed under a gate of the MOSFET to reduce drain to source resistance, as well as providing radiation hardening for the device.

A process for growing nanowires or nanopyramids comprising: (I) providing a graphitic substrate and depositing AlGaN, InGaN, AlN or AlGa(In)N on said graphitic substrate at an elevated temperature to form a buffer layer or nanoscale nucleation islands of said compounds; (II) growing a plurality of semiconducting group III-V nanowires or nanopyramids, preferably III-nitride nanowires or nanopyramids, on the said buffer layer or nucleation islands on the graphitic substrate, preferably via MOVPE or MBE.

A composition of matter comprising: a graphene layer carried directly on a sapphire, Si, SiC, Ga.sub.2O.sub.3 or group III-V semiconductor substrate; wherein a plurality of holes are present through said graphene layer; and wherein a plurality of nanowires or nanopyramids are grown from said substrate in said holes, said nanowires or nanopyramids comprising at least one semiconducting group III-V compound.