H01L21/02463

Semiconductor device and fabrication method

A semiconductor device comprising a silicon substrate on which is grown a <100 nm thick epilayer of AlAs or related compound, followed by a compound semiconductor other than GaN buffer layer. Further III-V compound semiconductor structures can be epitaxially grown on top. The AlAs epilayer reduces the formation and propagation of defects from the interface with the silicon, and so can improve the performance of an active structure grown on top.

QUANTUM HETEROSTRUCTURES, RELATED DEVICES AND METHODS FOR MANUFACTURING THE SAME

There is provided a quantum heterostructure and related devices, as well as methods for manufacturing the same. The quantum heterostructure includes a stack of coextending GeSn buffer layers and each GeSn buffer layer has a different Sn content one from another. The quantum heterostructure also includes a quantum well extending over the stack of coextending GeSn buffer layers, the quantum well comprising a highly tensile-strained layer, the highly tensile-strained layer comprising at least one group IV element and having a strain greater than or equal to 1%. The quantum heterostructure is compatible with silicon-based processing, manufacturing, and technologies. The method includes changing a reactor temperature and varying a molar fraction of an Sn-based precursor to achieve a stack of coextending GeSn buffer layers, each having a different Sn composition, on a substrate provided inside the reactor chamber and forming the quantum well over the stack of coextending GeSn buffer layers.

PATTERNED NANOCHANNEL SACRIFICIAL LAYER FOR SEMICONDUCTOR SUBSTRATE REUSE

Described herein are systems and methods of utilizing nanochannels generated in the sacrificial layer of a semiconductor substrate to increase epitaxial lift-off speeds and facilitate reusability of GaAs substrates. The provided systems and methods may utilize unique nanochannel geometries to increase the surface area exposed to the etchant and further decrease etch times.

Epitaxial wafer and method for manufacturing same

An epitaxial wafer which allows manufacture of a photodiode having suppressed dark current and ensured sensitivity, and a method for manufacturing the epitaxial wafer, are provided. The epitaxial wafer of the present invention includes: a III-V semiconductor substrate; and a multiple quantum well structure disposed on the substrate, and including a plurality of pairs of a first layer and a second layer. The total concentration of elements contained as impurities in the multiple quantum well structure is less than or equal to 5×10.sup.15 cm.sup.−3.

Strain compensation in transistors

An embodiment includes a device comprising: a first epitaxial layer, coupled to a substrate, having a first lattice constant; a second epitaxial layer, on the first layer, having a second lattice constant; a third epitaxial layer, contacting an upper surface of the second layer, having a third lattice constant unequal to the second lattice constant; and an epitaxial device layer, on the third layer, including a channel region; wherein (a) the first layer is relaxed and includes defects, (b) the second layer is compressive strained and the third layer is tensile strained, and (c) the first, second, third, and device layers are all included in a trench. Other embodiments are described herein.

Infrared detection element

This infrared detection element includes a buffer layer (InAsSb layer) 3, a buffer layer (InAs layer) 4, and a light absorption layer (InAsSb layer) 5. A critical film thickness hc of the InAs layer satisfies a relation of hc<t with a thickness t of the InAs layer. In this case, it is possible to improve crystallinities of the buffer layer 4 of InAs and the light absorption layer 5 of InAsSb formed on the buffer layer 3.

Semiconductor wafer, method of producing semiconductor wafer, and heterojunction bipolar transistor

Techniques are provided that can impart sufficient electrical conductivity to a semiconductor crystal exhibiting low doping efficiency for silicon atoms, such as InGaAs, by implanting only a small amount of silicon atoms. Such a semiconductor wafer may include a first semiconductor crystal layer, a second semiconductor crystal layer exhibiting a conductivity type that is different from the first layer, a third semiconductor crystal layer exhibiting the conductivity type of the first layer and having a larger band gap than the second semiconductor crystal layer, and a fourth semiconductor crystal layer exhibiting the conductivity type of the first layer and having a smaller band gap than the third semiconductor crystal layer. The fourth semiconductor crystal layer contains a first element that generates a first carrier of a corresponding conductivity type and a second element that generates a second carrier of a corresponding conductivity type.

Buffer Layers Having Composite Structures

Disclosed is a wafer or a material stack for semiconductor-based optoelectronic or electronic devices that minimizes or reduces misfit dislocation, as well as a method of manufacturing such wafer of material stack. A material stack according to the disclosed technology includes a substrate; a basis buffer layer of a first material disposed above the substrate; and a plurality of composite buffer layers disposed above the basis buffer layer sequentially along a growth direction. The growth direction is from the substrate to a last composite buffer layer of the plurality of composite buffer layers. Each composite buffer layer except the last composite buffer layer includes a first buffer sublayer of the first material, and a second buffer sublayer of a second material disposed above the first buffer sublayer. The thicknesses of the first buffer sublayers of the composite buffer layers decrease along the growth direction.

METAMORPHIC SOLAR CELLS

A multijunction solar cell including a metamorphic layer, and particularly the design and specification of the composition, lattice constant, and band gaps of various layers above the metamorphic layer in order to achieve reduction in “bowing” of the semiconductor wafer caused by the lattice mismatch of layers associated with the metamorphic layer.

Infrared detecting device and infrared detecting system including the same

Provided are an infrared detecting device and an infrared detecting system including the infrared detecting device. The infrared detecting device includes at least one infrared detector, and the at least one infrared detector includes a substrate, a buffer layer, and at least one light absorbing portion. The buffer layer includes a superlattice structure.