H01L21/02472

METHODS AND MATERIAL DEPOSITION SYSTEMS FOR FORMING SEMICONDUCTOR LAYERS
20210074542 · 2021-03-11 · ·

Systems and methods for forming semiconductor layers, including oxide-based layers, are disclosed in which a material deposition system has a rotation mechanism that rotates a substrate around a center axis of a substrate deposition plane of the substrate. A material source that supplies a material to the substrate has i) an exit aperture with an exit aperture plane and ii) a predetermined material ejection spatial distribution from the exit aperture plane. The exit aperture is positioned at an orthogonal distance, a lateral distance, and a tilt angle relative to the center axis of the substrate. The system can be configured for either i) minimum values for the orthogonal distance and the lateral distance to achieve a desired layer deposition uniformity using a set tilt angle, or ii) the tilt angle to achieve the desired layer deposition uniformity using a set orthogonal distance and a set lateral distance.

Methods and material deposition systems for forming semiconductor layers
10964537 · 2021-03-30 · ·

Systems and methods for forming semiconductor layers, including oxide-based layers, are disclosed in which a material deposition system has a rotation mechanism that rotates a substrate around a center axis of a substrate deposition plane of the substrate. A material source that supplies a material to the substrate has i) an exit aperture with an exit aperture plane and ii) a predetermined material ejection spatial distribution from the exit aperture plane. The exit aperture is positioned at an orthogonal distance, a lateral distance, and a tilt angle relative to the center axis of the substrate. The system can be configured for either i) minimum values for the orthogonal distance and the lateral distance to achieve a desired layer deposition uniformity using a set tilt angle, or ii) the tilt angle to achieve the desired layer deposition uniformity using a set orthogonal distance and a set lateral distance.

SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME

A semiconductor device and a method of manufacturing the semiconductor device are included. The method of manufacturing the semiconductor device includes forming a hafnium oxide layer on a substrate and crystallizing the hafnium oxide layer by using a hafnium cobalt oxide layer as a seed layer. According to the method of manufacturing the semiconductor device, a thin-film hafnium oxide layer may be easily crystallized.

SEMICONDUCTOR DEVICE AND METHOD FOR PRODUCING SAME

A semiconductor device (100) includes a TFT (10) supported on a substrate (11), wherein the TFT (10) includes a gate electrode (12g), a gate insulating layer (14) that covers the gate electrode (12g), and an oxide semiconductor layer (16) that is formed on the gate insulating layer (14). The oxide semiconductor layer 16 has a layered structure including a first oxide semiconductor layer (16a) in contact with the gate insulating layer (14) and a second oxide semiconductor layer (16b) layered on the first oxide semiconductor layer (16a). The first oxide semiconductor layer (16a) and the second oxide semiconductor layer (16b) both include In, Ga and Zn; an In atomic ratio of the first oxide semiconductor layer (16a) is greater than a Zn atomic ratio thereof, and an In atomic ratio of the second oxide semi-conductor layer (16b) is smaller than a Zn atomic ratio thereof; and the oxide semiconductor layer (16) has a side surface of a forward tapered shape.

III-NITRIDE OPTOELECTRONIC DEVICES AND METHOD OF PRODUCTION
20210013374 · 2021-01-14 ·

An optoelectronic device includes an oxide substrate, an oxide epitaxial layer arranged on the oxide substrate, and a III-nitride active layer arranged on the oxide epitaxial substrate.

EPITAXIAL LAYER WITH SUBSTANTIALLY PARALLEL SIDES

Embodiments herein relate to systems, apparatuses, or processes directed to manufacturing transistors that include a substrate, an epitaxial layer with a first side and a second side opposite the first side, where the first side and the second side of the epitaxial layer are substantially planar, where the second side of the epitaxial layer is substantially parallel to the first side, and where the first side of the epitaxial layer is directly coupled with a side of the substrate. In particular, the epitaxial layer may be adjacent to an oxide layer having a side that is substantially planar, where the second side of the epitaxial layer is adjacent to the side of the oxide layer, and the epitaxial layer was grown and the growth was constrained by the oxide layer.

Semiconductor device and method of manufacturing the same

A semiconductor device and a method of manufacturing the semiconductor device are included. The method of manufacturing the semiconductor device includes forming a hafnium oxide layer on a substrate and crystallizing the hafnium oxide layer by using a hafnium cobalt oxide layer as a seed layer. According to the method of manufacturing the semiconductor device, a thin-film hafnium oxide layer may be easily crystallized.

Seed layer for ferroelectric memory device and manufacturing method thereof

A method includes: providing a bottom layer; forming a first transistor over a substrate; forming a bottom electrode over the transistor; depositing a first seed layer over the bottom electrode; performing a surface treatment on the first seed layer, wherein after the surface treatment the first seed layer includes at least one of a tetragonal crystal phase and an orthorhombic crystal phase; depositing a dielectric layer over the bottom layer adjacent to the first seed layer, the dielectric layer including an amorphous crystal phase; depositing an upper layer over the dielectric layer; performing a thermal operation on the dielectric layer to thereby convert the dielectric layer into a ferroelectric layer.

Nanoscale Granularity Field Effect Transistor Array
20200348256 · 2020-11-05 ·

An electrochemical sensor array includes a thermal oxide configured to interface with one or more analytes. There is a transistor device layer that includes a plurality of field effect transistors (FETs) on top of the thermal oxide. A contact and wiring structure layer is on top of the transistor device layer and operative to couple to control nodes of each of the plurality of FETs. The contact and wiring structure are on a side opposite to that of the thermal oxide.

Manufacturing method for IGZO active layer and oxide thin film transistor

A manufacturing method for an IGZO active layer is disclosed. The method comprises steps of: after depositing a first metal layer and a gate insulation layer on a substrate, depositing an IGZO material on the gate insulation layer, and forming an IGZO film; and performing a plasma cleaning treatment on a surface of the IGZO film by using an argon gas or a helium gas to adjust element contents on the surface of the IGZO film, and forming an IGZO active layer. The present invention also correspondingly discloses a manufacturing method for an oxide thin film transistor. By implementing the embodiments of the present invention, the elements on the film surface of the IGZO active layer can be adjusted to improve electrical properties.