In an embodiment, a system includes: a chamber; and a magnetic assembly contained within the chamber. The magnetic assembly comprises: an inner magnetic portion comprising first magnets; and an outer magnetic portion comprising second magnets. At least two adjacent magnets, of either the first magnets or the second magnets, have different vertical displacements, and the magnetic assembly is configured to rotate around an axis to generate an electromagnetic field that moves ions toward a target region within the chamber.

Heterocrystals of metal dichalcogenides and Bi.sub.2S.sub.3, Bi.sub.2Se.sub.3 or Bi.sub.2Te.sub.3 are presented, in which the metal dichalcogenides and Bi.sub.2S.sub.3, Bi.sub.2Se.sub.3 or Bi.sub.2Te.sub.3 do not largely retain their independent properties. These heterocrystals exhibit electronic and optical changes, which make them attractive for beyond-silicon electronics and optoelectronics. Particularly, these heterocrystals can be re-configured in a manner that allows bit writing and pattern drawing. Embodiments of these heterocrystals, methods of forming these heterocrystals, methods of reconfiguring the heterocrystals, information storage devices, optoelectronic circuits and photonic crystals are presented.

A method for treating a micro electro-mechanical system (MEMS) component is disclosed. In one example, the method includes the steps of providing a first wafer, treating the first wafer to form cavities and at least an oxide layer on a top surface of the first wafer using a first chemical vapor deposition (CVD) process, providing a second wafer, bonding the second wafer on a top surface of the at least one oxide layer, treating the second wafer to form a first plurality of structures, depositing a layer of Self-Assembling Monolayer (SAM) to a surface of the MEMS component using a second CVD process.

The present invention provides a method for the formation of graphene on a silicon substrate, the method comprising: (i) providing a silicon wafer having a growth surface which is free of native oxides, in a reaction chamber; (ii) nitriding the growth surface with a nitrogen-containing gas with the wafer at a temperature in excess of 800° C., to thereby form a silicon nitride layer; and (iii) forming a graphene mono-layer or multiple layer structure on the silicon nitride layer; wherein the method is performed in-situ and sequentially in the reaction chamber. The present invention also provides a graphene-on-silicon layer structure having an intervening silicon nitride layer and free of any intervening native oxide layer.

Proposed are a layered compound having indium and arsenic, a nanosheet that may be prepared using the same, and an electrical device including the materials. Proposed is a layered compound represented by [Formula 1] Na.sub.1-xIn.sub.yAs.sub.z (0≤x<1.0, 0.8≤y≤1.2, 1.2≤z≤1.8).

A method of fabricating semiconductor devices including epitaxially depositing a heavily doped substrate layer that is substantially free of crystalline defects on a lightly doped virtual substrate. The device regions of the semiconductor devices can be fabricated about the heavily doped substrate layer before the lightly doped virtual substrate is removed.

A method includes depositing a copper layer over a first substrate, annealing the copper layer, depositing a hexagonal boron nitride (hBN) film on the copper layer, and removing the hBN film from the copper layer. The hBN film may be transferred to a second substrate.

Disclosed is a method for preparing a substrate relate to the field of semiconductors. The method comprises the following steps: S1, providing a reaction container in which a base substrate is mounted; S2, conducting a metal source into the reaction container, and forming a thin film layer on a surface of the base substrate, wherein a part of a surface of the base substrate is covered by the thin film layer, so that the base substrate is provided with an exposed surface that is not covered by the thin film layer; and S3, conducting a corrosive gas into the reaction container to form one or more recessed holes in at least a part of the exposed surface.

The present invention provides a method for the formation of graphene on a silicon substrate, the method comprising: (i) providing a silicon wafer having a growth surface which is free of native oxides, in a reaction chamber; (ii) nitriding the growth surface with a nitrogen-containing gas with the wafer at a temperature in excess of 800° C., to thereby form a silicon nitride layer; and (iii) forming a graphene mono-layer or multiple layer structure on the silicon nitride layer; wherein the method is performed in-situ and sequentially in the reaction chamber. The present invention also provides a graphene-on-silicon layer structure having an intervening silicon nitride layer and free of any intervening native oxide layer.

Embodiments of this disclosure include apparatus, systems, and methods for fabricating monolayers. In one example, a method includes forming a multilayer film having a plurality of monolayers of a two-dimensional (2D) material on a growth substrate. The multilayer film has a first side proximate the growth substrate and a second side opposite the first side.