Patent classifications
H01L21/02502
Nitride semiconductor template and nitride semiconductor device
There is provided a method for manufacturing a nitride semiconductor template constituted by forming a nitride semiconductor layer on a substrate, comprising: (a) forming a first layer by epitaxially growing a nitride semiconductor containing aluminum on the substrate; (b) applying annealing to the first layer in an inert gas atmosphere; and (c) forming a second layer by epitaxially growing a nitride semiconductor containing aluminum on the first layer by a vapor phase growth after performing (b), and constituting the nitride semiconductor layer by the first layer and the second layer.
NITRIDE SEMICONDUCTOR SUBSTRATE, SEMICONDUCTOR ELEMENT, AND METHOD FOR MANUFACTURING NITRIDE SEMICONDUCTOR SUBSTRATE
A nitride semiconductor substrate (11, 21) includes: a substrate (2); and an AlN-containing film (100, 200) provided above the substrate (2). A thickness of the AlN-containing film (100, 200) is at most 10000 nm, and a threading dislocation density of the AlN-containing film (100, 200) is at most 2×10.sup.8 cm.sup.−2.
SILICON CARBIDE SEMICONDUCTOR DEVICE
An n.sup.--type drift layer is an n.sup.--type epitaxial layer doped with nitrogen as an n-type dopant and is co-doped with aluminum as a p-type dopant, the n.sup.--type drift layer containing the nitrogen and aluminum substantially uniformly throughout. An n-type impurity concentration of the n.sup.--type drift layer is an impurity concentration determined by subtracting the aluminum concentration from the nitrogen concentration of the n.sup.--type drift layer; a predetermined blocking voltage is realized by the impurity concentration. A combined impurity concentration of the nitrogen and aluminum of the n.sup.--type drift layer is at least 3×10.sup.16/cm.sup.3.
Super-junction based vertical gallium nitride JFET power devices
A method for manufacturing a vertical JFET includes providing a III-nitride substrate having a first conductivity type; forming a first III-nitride layer coupled to the III-nitride substrate, wherein the first III-nitride layer is characterized by a first dopant concentration and the first conductivity type; forming a plurality of trenches within the first III-nitride layer, wherein the plurality of trenches extend to a predetermined depth; epitaxially regrowing a second III-nitride structure in the trenches, wherein the second III-nitride structure is characterized by a second conductivity type; forming a plurality of III-nitride fins, each coupled to the first III-nitride layer, wherein the plurality of III-nitride fins are separated by one of a plurality of recess regions; epitaxially regrowing a III-nitride gate layer in the recess regions, wherein the III-nitride gate layer is coupled to the second III-nitride structure, and wherein the III-nitride gate layer is characterized by the second conductivity type.
THIN FILM TRANSISTORS HAVING A SPIN-ON 2D CHANNEL MATERIAL
Thin film transistors having a spin-on two-dimensional (2D) channel material are described. In an example, an integrated circuit structure includes a first device layer including a first two-dimensional (2D) material layer above a substrate. The first 2D material layer includes molybdenum, sulfur, sodium and carbon. A second device layer including a second 2D material layer is above the substrate. The second 2D material layer includes tungsten, selenium, sodium and carbon.
THREE-COLOR 3D DRAM STACK AND METHODS OF MAKING
Methods of reducing wafer bowing in 3D DRAM devices are described using a 3-color process. A plurality of film stacks are formed on a substrate surface, each of the film stacks comprises two doped SiGe layers having different dopant amounts and/or Si:Ge ratios and a doped silicon layer. 3D DRAM devices are also described.
Film forming method and crystalline multilayer structure
The disclosure provides a film forming method that enables to obtain an epitaxial film with reduced defects such as dislocations due to a reduced facet growth industrially advantageously, even if the epitaxial film has a corundum structure. When forming an epitaxial film on a crystal-growth surface of a corundum-structured crystal substrate directly or via another layer, using the crystal substrate having an uneven portion on the crystal-growth surface of the crystal substrate, generating and floating atomized droplets by atomizing a raw material solution including a metal; carrying the floated atomized droplets onto a surface of the crystal substrate by using a carrier gas; and causing a thermal reaction of the atomized droplets in a condition of a supply rate limiting state.
III-NITRIDE/GALLIUM OXIDE BASED HIGH ELECTRON MOBILITY TRANSISTORS
High electron mobility transistors are provided which comprise a III-Nitride semiconductor layer comprising a III-Nitride semiconductor, in contact with a gallium oxide semiconductor layer comprising gallium oxide, forming an interface therebetween.
Method for producing GaN laminate substrate having front surface which is Ga polarity surface
The present invention includes: transferring a C-plane sapphire thin film 1t having an off-angle of 0.5-5° onto a handle substrate composed of a ceramic material having a coefficient of thermal expansion at 800 K that is greater than that of silicon and less than that of C-plane sapphire; performing high-temperature nitriding treatment on the GaN epitaxial growth substrate 11 and covering the surface of the C-plane sapphire thin film 1t with a surface treatment layer 11a made of AlN; having GaN grow epitaxially on the surface treatment layer 11a; ion-implanting a GaN film 13; pasting and bonding together the GaN film-side surface of the ion-implanted GaN film carrier and a support substrate 12; performing peeling at an ion implantation region 13.sub.ion in the GaN film 13 and transferring a GaN thin film 13a onto the support substrate 12; and obtaining a GaN laminate substrate 10.
GROUP-III-NITRIDE STRUCTURES AND MANUFACTURING METHODS THEREOF
A group-III-nitride structure and a manufacturing method thereof are provided. In the manufacturing method, a first mask layer is first formed on a substrate; an uncoalesced second group-III-nitride epitaxial layer is formed by performing a first epitaxial growth with the first mask layer as a mask; and a second mask layer is formed at least on the second group-III-nitride epitaxial layer; a third group-III-nitride epitaxial layer is laterally grown and formed by performing a second epitaxial growth on the second group-III-nitride epitaxial layer with the second mask layer as a mask, where the second group-III-nitride epitaxial layer is coalesced by the third group-III-nitride epitaxial layer; a fourth group-III-nitride epitaxial layer is formed by performing a third epitaxial growth on the third group-III-nitride epitaxial layer.