H01L21/02502

Catalytic formation of boron and carbon films

Exemplary methods of semiconductor processing may include providing a boron-containing precursor to a processing region of a semiconductor processing chamber. A substrate may be disposed within the processing region of the semiconductor processing chamber. The methods may include providing a carbon-containing precursor to the processing region of the semiconductor processing chamber. The carbon-containing precursor may be characterized by a carbon-carbon double bond or a carbon-carbon triple bond. The methods may include thermally reacting the boron-containing precursor and the carbon-containing precursor at a temperature below about 650° C. The methods may include forming a boron-and-carbon-containing layer on the substrate.

METHOD FOR FORMING FILM AND PROCESSING APPARATUS
20220319843 · 2022-10-06 ·

A method for forming a film that includes forming a boron nitride film on a substrate, and forming a boron-containing silicon film on the boron nitride film.

METHOD OF DEPOSITING SILICON FILM AND FILM DEPOSITION APPARATUS

To provide a method of depositing a silicon film that can crystallize the silicon film at low temperature and in a short time, and also can deposit the silicon film with high flatness. A method of depositing a silicon film includes supplying a silicon-containing gas on a seed layer, depositing an amorphous silicon film on the seed layer, supplying chlorosilane gas to the amorphous silicon film, and crystallizing the amorphous silicon film while forming a chlorosilane cap layer on the amorphous silicon film.

NUCLEATION LAYERS FOR GROWTH OF GALLIUM-AND-NITROGEN-CONTAINING REGIONS

Exemplary processing methods include forming a nucleation layer on a substrate. The nucleation layer may be formed by physical vapor deposition (PVD), and the physical vapor deposition may be characterized by a deposition temperature of greater than or about 700° C. The methods may further include forming a patterned mask layer on the nucleation layer. The patterned mask layer may include openings that expose portions of the nucleation layer. Gallium-and-nitrogen-containing regions may be formed on the exposed portions of the nucleation layer. In additional embodiments, the nucleation layer may include a first and second portion separated by an interlayer that stop the propagation of at least some dislocations in the nucleation layer.

METHOD OF CRYSTALLIZING AMORPHOUS SILICON FILM AND DEPOSITION APPARATUS

A method of crystallizing an amorphous silicon film includes depositing the amorphous silicon film on a seed layer formed over a substrate while heating the amorphous silicon film at a first temperature, and forming a crystal nucleus in an outer layer of the amorphous silicon film by causing migration of silicon in the outer layer by heating the amorphous silicon film at a second temperature higher than the first temperature.

Method and system for group IIIA nitride growth
11651959 · 2023-05-16 ·

A system and method for growing a gallium nitride (GaN) structure that includes providing a template; and growing at least a first GaN layer on the template using a first sputtering process, wherein the first sputtering process includes: controlling a temperature of a sputtering target, and modulating between a gallium-rich condition and a gallium-lean condition, wherein the gallium-rich condition includes a gallium-to-nitrogen ratio having a first value that is greater than 1, and wherein the gallium-lean condition includes the gallium-to-nitrogen ratio having a second value that is less than the first value. Some embodiments include a load lock configured to load a substrate wafer into the system and remove the GaN structure from the system; and a plurality of deposition chambers, wherein the plurality of deposition chambers includes a GaN-deposition chamber configured to grow at least the first GaN layer on a template that includes the substrate wafer.

Method of forming a device structure using selective deposition of gallium nitride and system for same

A method of forming a device structure including a selectively-deposited gallium nitride layer is disclosed.

MOISTURE GOVERNED GROWTH METHOD OF ATOMIC LAYER RIBBONS AND NANORIBBONS OF TRANSITION METAL DICHALCOGENIDES
20230141275 · 2023-05-11 ·

A method of making an atomic layer nanoribbon that includes forming a double atomic layer ribbon having a first monolayer and a second monolayer on a surface of the first monolayer, wherein the first monolayer and the second monolayer each contains a transition metal dichalcogenide material, oxidizing at least a portion of the first monolayer to provide an oxidized portion, and removing the oxidized portion to provide an atomic layer nanoribbon of the transition metal dichalcogenide material. Also provided are double atomic layer ribbons, double atomic layer nanoribbons, and single atomic layer nanoribbons prepared according to the method.

VAPOR PHASE GROWTH METHOD AND VAPOR PHASE GROWTH APPARATUS

A vapor phase growth method of embodiments includes: forming a first silicon carbide layer having a first doping concentration on a silicon carbide substrate at a first growth rate by supplying a first process gas under a first gas condition; forming a second silicon carbide layer having a second doping concentration at a second growth rate higher than the first growth rate by supplying a second process gas under a second gas condition; and forming a third silicon carbide layer having a third doping concentration lower than the first doping concentration and the second doping concentration at a third growth rate higher than the second growth rate by supplying a third process gas under a third gas condition.

Manufacturing process of a structured substrate

A method for manufacturing a structured substrate provided with a trap-rich layer whereon rests a stack consisting of an insulating layer and of a layer of single-crystal material, includes forming an amorphous silicon layer on a front face of a silicon substrate and heat treating intended to convert the amorphous silicon layer into a trap-rich layer made of single-crystal silicon grains. The heat treatment conditions in terms of duration and of temperature are adjusted to limit the grains to a size less than 200 nm. The method also includes overlapping the trap-rich layer with an insulating layer and a layer of single-crystal material.