H01L21/02502

WAFER, SEMICONDUCTOR DEVICE, AND METHOD FOR MANUFACTURING THE WAFER

According to one embodiment, a wafer includes a silicon substrate including a first surface, and a nitride semiconductor layer provided on the first surface. The silicon substrate includes a plurality of first regions that can be distinguished from each other in an X-ray image of the wafer. The first regions are separated from an outer edge region of the silicon substrate. One of the first regions includes a plurality of first linear bodies along a first line direction. An other one of the first regions includes a plurality of second linear bodies along a second line direction. The second line direction crosses the first line direction.

METHOD AND APPARATUS FOR FORMING CRYSTALLINE SILICON FILM
20230197447 · 2023-06-22 ·

A method of forming a crystalline silicon film includes forming a first amorphous silicon film on a substrate, forming a crystal nucleation film in which crystal nuclei of silicon are formed by performing a first annealing on the substrate having the first amorphous silicon film formed thereon, performing etching with an etching gas, forming a second amorphous silicon film on the crystal nuclei remaining after the etching, and forming a crystalline silicon film by performing a second annealing on the substrate after the forming of the second amorphous silicon film to grow the crystal nuclei.

Method of manufacturing group III nitride semiconductor substrate, group III nitride semiconductor substrate, and bulk crystal

There is provided a method of manufacturing a group III nitride semiconductor substrate including: a fixing step S10 of fixing abase substrate, which includes a group III nitride semiconductor layer having a semipolar plane as a main surface, to a susceptor; a first growth step S11 of forming a first growth layer by growing a group III nitride semiconductor over the main surface of the group III nitride semiconductor layer in a state in which the base substrate is fixed to the susceptor using an HVPE method; a cooling step S12 of cooling a laminate including the susceptor, the base substrate, and the first growth layer; and a second growth step S13 of forming a second growth layer by growing a group III nitride semiconductor over the first growth layer in a state in which the base substrate is fixed to the susceptor using the HVPE method.

Rare Earth Pnictides for Strain Management
20170353002 · 2017-12-07 ·

Systems and methods described herein may include a first semiconductor layer with a first lattice constant, a rare earth pnictide buffer epitaxially grown over the first semiconductor, wherein a first region of the rare earth pnictide buffer adjacent to the first semiconductor has a net strain that is less than 1%, a second semiconductor layer epitaxially grown over the rare earth pnictide buffer, wherein a second region of the rare earth pnictide buffer adjacent to the second semiconductor has a net strain that is a desired strain, and wherein the rare earth pnictide buffer may comprise one or more rare earth elements and one or more Group V elements. In some examples, the desired strain is approximately zero.

GROUP IIIA NITRIDE GROWTH SYSTEM AND METHOD
20170345642 · 2017-11-30 ·

A system and method for growing a gallium nitride (GaN) structure that includes providing a template; and growing at least a first GaN layer on the template using a first sputtering process, wherein the first sputtering process includes: controlling a temperature of a sputtering target, and modulating between a gallium-rich condition and a gallium-lean condition, wherein the gallium-rich condition includes a gallium-to-nitrogen ratio having a first value that is greater than 1, and wherein the gallium-lean condition includes the gallium-to-nitrogen ratio having a second value that is less than the first value. Some embodiments include a load lock configured to load a substrate wafer into the system and remove the GaN structure from the system; and a plurality of deposition chambers, wherein the plurality of deposition chambers includes a GaN-deposition chamber configured to grow at least the first GaN layer on a template that includes the substrate wafer.

FABRICATION OF COMPOUND SEMICONDUCTOR STRUCTURES

A semiconductor substrate, comprising a first semiconductor material, is provided and an insulating layer is formed thereon; an opening is formed in the insulating layer. Thereby, a seed surface of the substrate is exposed. The opening has sidewalls and a bottom and the bottom corresponds to the seed surface of the substrate. A cavity structure is formed above the insulating layer, including the opening and a lateral growth channel extending laterally over the substrate. A matching array is grown on the seed surface of the substrate, including at least a first semiconductor matching structure comprising a second semiconductor material and a second semiconductor matching structure comprising a third semiconductor material. The compound semiconductor structure comprising a fourth semiconductor material is grown on a seed surface of the second matching structure. The first through fourth semiconductor materials are different from each other. Corresponding semiconductor structures are also included.

COMPOSITE SUBSTRATE, METHOD FOR PRODUCING COMPOSITE SUBSTRATE, SEMICONDUCTOR DEVICE, AND METHOD FOR PRODUCING SEMICONDUCTOR DEVICE
20230178368 · 2023-06-08 · ·

A composite substrate of the present disclosure is composed of two parts: a SiC substrate; and a Si-containing thermal-sprayed layer made of a material obtained by melting Si or a Si alloy through thermal spraying. The Si-containing thermal-sprayed layer serves as a support substrate for supporting the SiC substrate so as to keep the mechanical strength thereof, and is provided at one surface of the SiC substrate on the side opposite to a surface where a nitride semiconductor layer composed of layers made of nitride semiconductors such as an AlN buffer layer, a GaN buffer layer, and an AlGaN Schottky layer is formed through epitaxial growth.

Epitaxies of a Chemical Compound Semiconductor
20220367176 · 2022-11-17 ·

Methods and structures includes providing a substrate, forming a prelayer over a substrate, forming a barrier layer over the prelayer, and forming a channel layer over the barrier layer. Forming the prelayer may include growing the prelayer at a graded temperature. Forming the barrier layer is such that the barrier layer may include GaAs or InGaAs. Forming the channel layer is such that the channel layer may include InAs or an Sb-based heterostructure. Thereby structures are formed.

Fabrication Method of Oxide Semiconductor Thin Film and Fabrication Method of Thin Film Transistor
20170338113 · 2017-11-23 ·

The present invention provides a fabrication method of an oxide semiconductor thin film and a fabrication method of a thin film transistor, belongs to the field of display technology, and can solve the problem of high crystallization temperature and high difficulty in fabrication process of an oxide semiconductor thin film in the existing oxide thin film transistor. The fabrication method of an oxide semiconductor thin film of the present invention includes: forming an induction layer thin film on a substrate; and forming an oxide semiconductor thin film on the substrate formed with the induction layer thin film, and performing an annealing process on the oxide semiconductor thin film to crystallize the oxide semiconductor thin film.

SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF

A semiconductor device includes a substrate, a first semiconductor fin and a gate stack. The first semiconductor fin is over the substrate and includes a first germanium-containing layer and a second germanium-containing layer over the first germanium-containing layer. The first germanium-containing layer has a germanium atomic percentage higher than a germanium atomic percentage of the second germanium-containing layer. The gate stack is across the first semiconductor fin.