Fabrication Method of Oxide Semiconductor Thin Film and Fabrication Method of Thin Film Transistor
20170338113 · 2017-11-23
Inventors
Cpc classification
H01L21/02565
ELECTRICITY
H01L29/66969
ELECTRICITY
H01L29/045
ELECTRICITY
H01L21/02667
ELECTRICITY
H01L29/7869
ELECTRICITY
H01L29/78696
ELECTRICITY
International classification
H01L21/02
ELECTRICITY
H01L29/786
ELECTRICITY
Abstract
The present invention provides a fabrication method of an oxide semiconductor thin film and a fabrication method of a thin film transistor, belongs to the field of display technology, and can solve the problem of high crystallization temperature and high difficulty in fabrication process of an oxide semiconductor thin film in the existing oxide thin film transistor. The fabrication method of an oxide semiconductor thin film of the present invention includes: forming an induction layer thin film on a substrate; and forming an oxide semiconductor thin film on the substrate formed with the induction layer thin film, and performing an annealing process on the oxide semiconductor thin film to crystallize the oxide semiconductor thin film.
Claims
1-14. (canceled)
15. A fabrication method of an oxide semiconductor thin film, comprising steps of: forming an induction layer thin film on a substrate; and forming an oxide semiconductor thin film on the substrate formed with the induction layer thin film, and performing an annealing process on the oxide semiconductor thin film to crystallize the oxide semiconductor thin film.
16. The fabrication method of an oxide semiconductor thin film according to claim 15, further comprising, before the step of forming an oxide semiconductor thin film, a step of: performing an annealing process on the formed induction layer thin film.
17. The fabrication method of an oxide semiconductor thin film according to claim 16, wherein, the annealing process is performed on the formed induction layer thin film at an annealing temperature ranging from 300° C. to 600° C.
18. The fabrication method of an oxide semiconductor thin film according to claim 15, wherein, the induction layer thin film has a thickness ranging from 5 nm to 50 nm; and the oxide semiconductor thin film has a thickness ranging from 30 nm to 200 nm.
19. The fabrication method of an oxide semiconductor thin film according to claim 15, wherein, the annealing process is performed on the oxide semiconductor thin film at an annealing temperature ranging from 300° C. to 500° C.
20. The fabrication method of an oxide semiconductor thin film according to claim 15, further comprising, before the step of forming an induction layer thin film, a step of: forming a buffer layer on the substrate, wherein the induction layer thin film is formed on the buffer layer.
21. The fabrication method of an oxide semiconductor thin film according to claim 20, wherein, the buffer layer comprises at least one layer formed by silicon oxide or silicon nitride.
22. The fabrication method of an oxide semiconductor thin film according to claim 20, wherein, the buffer layer has a thickness ranging from 150 nm to 300 nm.
23. The fabrication method of an oxide semiconductor thin film according to claim 15, wherein, the induction layer thin film is made of zinc oxide.
24. The fabrication method of an oxide semiconductor thin film according to claim 15, wherein, the oxide semiconductor thin film is made of any one of indium gallium zinc oxide, indium zinc oxide, indium tin oxide and indium gallium tin oxide.
25. The fabrication method of an oxide semiconductor thin film according to claim 15, wherein, crystallizing the oxide semiconductor thin film specifically comprises converting the oxide semiconductor thin film into a polycrystalline oxide semiconductor thin film or an oxide semiconductor thin film with a c-axis preferential orientation growth.
26. The fabrication method of an oxide semiconductor thin film according to claim 16, wherein, crystallizing the oxide semiconductor thin film specifically comprises converting the oxide semiconductor thin film into a polycrystalline oxide semiconductor thin film or an oxide semiconductor thin film with a c-axis preferential orientation growth.
27. The fabrication method of an oxide semiconductor thin film according to claim 17, wherein, crystallizing the oxide semiconductor thin film specifically comprises converting the oxide semiconductor thin film into a polycrystalline oxide semiconductor thin film or an oxide semiconductor thin film with a c-axis preferential orientation growth.
28. The fabrication method of an oxide semiconductor thin film according to claim 18, wherein, crystallizing the oxide semiconductor thin film specifically comprises converting the oxide semiconductor thin film into a polycrystalline oxide semiconductor thin film or an oxide semiconductor thin film with a c-axis preferential orientation growth.
29. The fabrication method of an oxide semiconductor thin film according to claim 19, wherein, crystallizing the oxide semiconductor thin film specifically comprises converting the oxide semiconductor thin film into a polycrystalline oxide semiconductor thin film or an oxide semiconductor thin film with a c-axis preferential orientation growth.
30. A fabrication method of a thin film transistor, comprising a step of forming an active layer, wherein, the step of forming an active layer comprises: forming an induction layer thin film on a substrate; and forming an oxide semiconductor thin film on the substrate formed with the induction layer thin film, and performing an annealing process on the oxide semiconductor thin film to crystallize the oxide semiconductor thin film; and performing a patterning process on the substrate formed with the crystallized oxide semiconductor thin film to form a pattern including the active layer.
31. The fabrication method of a thin film transistor according to claim 30, further comprising, before the step of forming the induction layer thin film, steps of: forming a pattern including a gate electrode of the thin film transistor on the substrate through a patterning process; and forming a gate insulation layer on the substrate formed with the gate electrode, wherein the induction layer thin film is formed on the gate insulation layer.
32. The fabrication method of a thin film transistor according to claim 30, further comprising, after the oxide semiconductor thin film is crystallized, and at the same time when a pattern of the active layer is formed, a step of: forming a source-drain metal film on the substrate formed with the crystallized oxide semiconductor thin film, and forming a pattern including a source electrode and a drain electrode through a patterning process.
Description
BRIEF DESCRIPTION OF THE FIGURES
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[0036]
[0037]
[0038]
DETAILED DESCRIPTION
[0039] To enable those skilled in the art to better understand technical solutions of the present invention, the present invention will be further described in detail below in conjunction with the accompanying drawings and the specific implementations.
First Embodiment
[0040] As shown in
[0041] Step 1 includes: forming an induction layer thin film 2 on a substrate 1 using a method such as thermal growth, atmospheric chemical vapor deposition, low-pressure chemical vapor deposition, plasma-assisted chemical vapor deposition, sputtering or sol-gel.
[0042] Here, the substrate 1 may refer to a substrate on which no film is formed, for example, white glass, or refer to a substrate on which other film(s) or pattern(s) is(are) formed, for example, a substrate on which a buffer layer 4 is formed. The induction layer thin film 2 is preferably made of zinc oxide (ZnO), and preferably has a thickness ranging from 5 nm to 50 nm. It should be noted that, due to the material of the induction layer thin film 2 itself, at least part of the material of the induction layer thin film 2 has been crystallized during deposition, and thus, the induction layer thin film 2 formed in step 1 can be interpreted as an induction layer thin film which is at least partially crystallized.
[0043] Step 2 includes: forming an oxide semiconductor thin film 3 on the substrate 1 subjected to step 1 using a method such as thermal growth, atmospheric chemical vapor deposition, low-pressure chemical vapor deposition, plasma-assisted chemical vapor deposition or sputtering, and then performing an annealing process at an annealing temperature ranging from 300° C. to 500° C., so that the oxide semiconductor thin film 3 is induced by the induction layer thin film 2 to be crystallized, specifically, the oxide semiconductor thin film 3 is converted into a polycrystalline oxide semiconductor thin film or an oxide semiconductor thin film with a c-axis preferential orientation growth.
[0044] Material of the oxide semiconductor thin film 3 may include at least three elements selected from a group consisting of In (indium), Ga (gallium), Zn (zinc), O (oxygen) and Sn (tin), and the oxide semiconductor thin film 3 is formed on the substrate 1 subjected to step 1 through a process such as sputtering. Further, the oxide semiconductor thin film 3 must contain oxygen and two or more other elements, for example, contain Indium Gallium Zinc Oxide (IGZO), Indium Zinc Oxide (IZO), Indium Tin Oxide (ITO), Indium Gallium Tin Oxide (IGTO), or the like. The oxide semiconductor thin film 3 is preferably made of IGZO or IZO, and preferably has a thickness ranging from 30 nm to 200 nm.
[0045] It should be noted that, if the oxide semiconductor thin film 3 is directly heated without being induced by using the induction layer thin film 2 (i.e., the method adopted in the prior art), the temperature required for crystallizing the oxide semiconductor thin film 3 is far higher than the temperature required for heating the oxide semiconductor thin film 3 that has been induced by the induction layer thin film 2 to crystallize the oxide semiconductor thin film 3 in the present embodiment.
[0046] Specifically, assuming that the oxide semiconductor thin film 3 is made of IGZO and the IGZO is directly heated to be crystallized, the heating temperature is approximately 800° C.; whereas if an annealing process is performed on the oxide semiconductor thin film 3 that has been induced by the induction layer thin film 2 made of zinc oxide, so as to crystallize the oxide semiconductor thin film 3, the annealing temperature ranges from 300° C. to 500° C., which greatly lowers process difficulty.
[0047] In the fabrication method of the oxide semiconductor thin film 3 of the present embodiment, the oxide semiconductor thin film 3 formed on the induction layer thin film 2 is induced by the induction layer thin film 2, so that the oxide semiconductor thin film 3 grows according to crystal orientation of the induction layer thin film 2 to obtain a polycrystalline oxide semiconductor thin film or an oxide semiconductor thin film with a c-axis preferential orientation growth. Crystallization temperature of the oxide semiconductor thin film is relatively low in the present fabrication method, and thus the present fabrication method has relatively low process difficulty and can obtain the oxide semiconductor thin film 3 with optimized properties.
Second Embodiment
[0048] As shown in
[0049] Step 1 includes: forming a buffer layer 4 on a substrate 1 by a method such as sputtering, thermal evaporation, plasma enhanced chemical vapor deposition, low pressure chemical vapor deposition, atmospheric pressure chemical vapor deposition, electron cyclotron resonance chemical vapor deposition or the like.
[0050] The buffer layer 4 includes at least one layer formed by silicon oxide or silicon nitride, and preferably has a thickness ranging from 150 nm to 300 nm. The purpose for forming such a thick buffer layer 4 is to form an effective heat blocking layer for thermal insulation, so that the oxide semiconductor thin film 3 formed in a subsequent step can be fully crystallized.
[0051] Step 2 includes: forming an induction layer thin film 2 on the substrate 1 subjected to the above step 1 by a method such as thermal growth, atmospheric chemical vapor deposition, low-pressure chemical vapor deposition, plasma-assisted chemical vapor deposition, sputtering or sol-gel, and performing an annealing process on the formed induction layer thin film 2 at an annealing temperature ranging from 300° C. to 600° C. to fully crystallize the induction layer thin film 2, so that the oxide semiconductor thin film 3 can be better induced and crystallized in the subsequent step.
[0052] The induction layer thin film 2 is preferably made of zinc oxide (ZnO), and preferably has a thickness ranging from 5 nm to 50 nm. It should be noted that, due to the material of the induction layer thin film 2 itself, at least part of the material of the induction layer thin film 2 has been crystallized during deposition, then the annealing process is performed on the induction layer thin film 2 to fully crystallize the induction layer thin film 2, and thus, the induction layer thin film 2 formed in step 2 can be interpreted as a crystallized induction layer thin film 2.
[0053] Step 3 includes: forming an oxide semiconductor thin film 3 on the substrate 1 subjected to the above step 2 by using a method such as thermal growth, atmospheric chemical vapor deposition, low-pressure chemical vapor deposition, plasma-assisted chemical vapor deposition or sputtering, and then performing an annealing process at an annealing temperature ranging from 300° C. to 500° C., so that the oxide semiconductor thin film 3 is induced by the induction layer thin film 2 to be crystallized, specifically, the oxide semiconductor thin film 3 is converted into a polycrystalline oxide semiconductor thin film or an oxide semiconductor thin film with a c-axis preferential orientation growth.
[0054] Material of the oxide semiconductor thin film 3 may include at least three elements selected from a group consisting of In (indium), Ga (gallium), Zn (zinc), O (oxygen) and Sn (tin), and the oxide semiconductor thin film 3 is formed on the substrate 1 subjected to the above step 2 through a process such as sputtering. Further, the oxide semiconductor thin film 3 must contain oxygen and two or more other elements, for example, contain Indium Gallium Zinc Oxide (IGZO), Indium Zinc Oxide (IZO), Indium Tin Oxide (ITO), Indium Gallium Tin Oxide (IGTO), or the like. The oxide semiconductor thin film 3 is preferably made of IGZO or IZO, and preferably has a thickness ranging from 30 nm to 200 nm.
[0055] In the fabrication method of the oxide semiconductor thin film 3 of the present embodiment, the oxide semiconductor thin film 3 formed on the induction layer thin film 2 is induced by the induction layer thin film 2, so that the oxide semiconductor thin film 3 grows according to crystal orientation of the induction layer thin film 2 to obtain a polycrystalline oxide semiconductor thin film or an oxide semiconductor thin film with a c-axis preferential orientation growth. Particularly, the buffer layer 4 is formed before the induction layer thin film 2 is deposited (that is, the buffer layer 4 is formed between the substrate 1 and the induction layer thin film 2) to form an effective heat blocking layer, so that the oxide semiconductor thin film 3 formed in the subsequent step can be fully crystallized. Crystallization temperature of the oxide semiconductor thin film is relatively low in the present fabrication method, and thus the present fabrication method has relatively low process difficulty and can obtain the oxide semiconductor thin film 3 with optimized properties.
Third Embodiment
[0056] As shown in
[0057] The fabrication method of the bottom gate type thin film transistor includes steps 1 to 4 as follows.
[0058] Step 1 includes: depositing a layer of gate metal film on a substrate 1 using a magnetron sputtering method, and forming a pattern including a gate electrode 5 of the thin film transistor by a patterning process.
[0059] The gate metal film may be a monolayer film formed by one or more of molybdenum (Mo), molybdenum niobium alloy (MoNb), aluminum (Al), aluminum neodymium alloy (AlNd), titanium (Ti) and copper (Cu), or a multilayer composite laminate formed by multiple materials selected from molybdenum (Mo), molybdenum niobium alloy (MoNb), aluminum (Al), aluminum neodymium alloy (AlNd), titanium (Ti) and copper (Cu). Preferably, the gate metal film is a monolayer film formed by Mo, Al, or an alloy containing Mo and Al, or a multilayer composite film formed by multiple materials selected from Mo, Al, or an alloy containing Mo and Al.
[0060] Step 2 includes: forming a gate insulation layer 6 on the substrate 1 subjected to step 1 by using a method such as thermal growth, atmospheric chemical vapor deposition, low-pressure chemical vapor deposition, plasma-assisted chemical vapor deposition, sputtering or the like.
[0061] The gate insulation layer 6 may be a multilayer composite film formed by one or any two of silicon oxide (SiOx), silicon nitride (SiNx), hafnium oxide (HfOx), silicon oxynitride (SiON), aluminum oxide (AlOx), and the like.
[0062] Step 3 includes: sequentially forming an induction layer thin film 2 and an oxide semiconductor thin film 3 on the substrate 1 subjected to step 2, and performing an annealing process on the oxide semiconductor thin film 3 to form a crystallized oxide semiconductor thin film.
[0063] Step 3 may be implemented by using the method in the first embodiment, or by using the method in the second embodiment, and thus is not described in detail herein.
[0064] Because the gate insulation layer 6 is provided under the oxide semiconductor thin film 3, and can be used for thermal insulation like the buffer layer 4, a step of forming the buffer layer 4 can be omitted in step 3.
[0065] Step 4 includes: on the substrate 1 subjected to step 3, first forming a source-drain metal layer 70, then applying a photoresist 80, and performing exposure using a halftone mask or a gray scale mask, so as to form a pattern including an active layer 20, a source electrode 7-1 and a drain electrode 7-2 of the thin film transistor, wherein the active layer 20 is a crystallized active layer, the source electrode 7-1 contacts the active layer 20 through a source contact area, and the drain electrode 7-2 contacts the active layer 20 through a drain contact area.
[0066] The source-drain metal layer 70 may be formed by one or more of molybdenum (Mo), molybdenum niobium alloy (MoNb), aluminum (Al), aluminum neodymium alloy (AlNd), titanium (Ti) and copper (Cu), and is preferably formed by Mo, Al or an alloy containing Mo and Al.
[0067] At this point, fabrication of the bottom gate type thin film transistor is completed. A passivation layer 9 and a pixel electrode 10 may be sequentially formed on the thin film transistor such that the pixel electrode 10 contacts the drain electrode 7-2, so as to form an array substrate, as shown in
[0068] In the embodiment, the crystallized active layer is formed while being induced by the induction layer thin film, so the oxide semiconductor thin film can be crystallized without high temperature treatment, the crystallized active layer is formed in a subsequent step, and there is no need to form an etch stop layer, thus making the fabrication process easy to implement.
[0069] It can be understood that, the above implementations are merely exemplary implementations used for explaining the principle of the present invention, but the present invention is not limited thereto. For those skilled in the art, various modifications and improvements may be made without departing from the spirit and essence of the present invention, and these modifications and improvements are also deemed as falling within the protection scope of the present invention.