H01L21/0251

EPITAXIAL STRUCTURE
20210336011 · 2021-10-28 ·

An epitaxial structure includes a substrate, a buffer layer, a channel layer, a barrier layer, a diffusion barrier layer, and a P-type gallium nitride layer sequentially stacked from bottom to top. The P-type gallium nitride layer has a first lattice constant. The diffusion barrier layer includes a chemical composition of In.sub.x1Al.sub.y1Ga.sub.z1N, where x1+y1+z1=1, 0≤x1≤0.3, 0≤y1≤1.0, and 0≤z1≤1.0. The chemical composition of the diffusion barrier layer has a proportional relationship so that the diffusion barrier layer has a second lattice constant that matches the first lattice constant, and the second lattice constant is between 80% and 120% of the first lattice constant.

GALLIUM OXIDE FILM BASED ON SAPPHIRE SUBSTRATE AS WELL AS GROWTH METHOD AND APPLICATION THEREOF

The disclosure provides a gallium oxide film based on sapphire substrate as well as a growth method and an application thereof. The gallium oxide film based on sapphire substrate is prepared by a method below, including: forming more than one α-(Al.sub.xGa.sub.1−x).sub.2O.sub.3 strain buffering layers on the sapphire substrate by means of pulsed epitaxial growth, wherein 0.99≥x≥0.01; and forming gallium oxide epitaxial layers on the α-(Al.sub.xGa.sub.1−x).sub.2O.sub.3 strain buffering layers. The growth method provided can not only avoid the technical difficulty of contradictory epitaxial temperatures of α-Ga.sub.2O.sub.3 and α-Al.sub.2O.sub.3, but also effectively reduce the defect density of α-Ga.sub.2O.sub.3 epitaxial film, thus further improving the crystal quality of the α-Ga.sub.2O.sub.3 epitaxial film materials.

GROUND SUBSTRATE AND METHOD FOR PRODUCING SAME
20210404089 · 2021-12-30 · ·

Provided is a base substrate including an orientation layer used for crystal growth of a nitride or oxide of a Group 13 element, in which a front surface on a side used for the crystal growth of the orientation layer is composed of a material having a corundum-type crystal structure having an a-axis length and/or c-axis length larger than that of sapphire, the orientation layer contains a material selected from the group consisting of α-Cr.sub.2O.sub.3, α-Fe.sub.2O.sub.3, α-Ti.sub.2O.sub.3, α-V.sub.2O.sub.3, and α-Rh.sub.2O.sub.3, or a solid solution containing two or more selected from the group consisting of α-Al.sub.2O.sub.3, α-Cr.sub.2O.sub.3, α-Fe.sub.2O.sub.3, α-Ti.sub.2O.sub.3, α-V.sub.2O.sub.3, and α-Rh.sub.2O.sub.3, and a half width of an X-ray rocking curve of a (104) plane of the corundum-type crystal structure is 500 arcsec. or less.

Advanced electronic device structures using semiconductor structures and superlattices

Semiconductor structures and methods for forming those semiconductor structures are disclosed. For example, a semiconductor structure with a p-type superlattice region, an i-type superlattice region, and an n-type superlattice region is disclosed. The semiconductor structure can have a polar crystal structure with a growth axis that is substantially parallel to a spontaneous polarization axis of the polar crystal structure. In some cases, there are no abrupt changes in polarisation at interfaces between each region. At least one of the p-type superlattice region, the i-type superlattice region and the n-type superlattice region can comprise a plurality of unit cells exhibiting a monotonic change in composition from a wider band gap (WBG) material to a narrower band gap (NBG) material or from a NBG material to a WBG material along the growth axis to induce p-type or n-type conductivity.

III-NITRIDE MATERIAL SEMICONDUCTOR STRUCTURES ON CONDUCTIVE SILICON SUBSTRATES
20210296481 · 2021-09-23 ·

III-nitride materials are described herein, including material structures comprising III-nitride material regions (e.g., gallium nitride material regions). In certain cases, the material structures also comprise substrates having relatively high electrical conductivities. Certain embodiments include one or more features that reduce the degree to which thermal runaway occurs, which can enhance device performance including at elevated flange temperatures. Some embodiments include one or more features that reduce the degree of capacitive coupling exhibited during operation. For example, in some embodiments, relatively thick III-nitride material regions and/or relatively small ohmic contacts are employed.

GROWTH OF CUBIC CRYSTALLINE PHASE STRUCTURE ON SILICON SUBSTRATES AND DEVICES COMPRISING THE CUBIC CRYSTALLINE PHASE STRUCTURE

A method of forming a semiconductor structure includes providing a substrate comprising a first material portion and a single crystal silicon layer on the first material portion. The substrate further comprises a major front surface, a major backside surface opposing the major front surface, and a plurality of grooves positioned in the major front surface. A buffer layer is deposited in one or more of the plurality of grooves. A semiconductor material is epitaxially grown over the buffer layer and in the one or more plurality of grooves, the epitaxially grown semiconductor material comprising a hexagonal crystalline phase layer and a cubic crystalline phase structure disposed over the hexagonal crystalline phase.

Semiconductor structure having a group iii-v semiconductor layer comprising a hexagonal mesh crystalline structure

A semiconductor structure (100) comprising: a substrate (102), a first layer (106) of Al.sub.xGa.sub.yIn.sub.(1-x-y)N disposed on the substrate, stacks (107, 109) of several second and third layers (108, 110) alternating against each other, between the substrate and the first layer, a fourth layer (112) of Al.sub.xGa.sub.yIn.sub.(1-x-y)N, between the stacks, a relaxation layer of AIN disposed between the fourth layer and one of the stacks, and, in each of the stacks: the level of Ga of the second layers increases from one layer to the next in a direction from the substrate to the first layer, the level of Ga of the third layers is constant or decreasing from one layer to the next in said direction, the average mesh parameter of each group of adjacent second and third layers increasing from one group to the next in said direction, the thickness of the second and third layers is less than 5 nm.

Spectroscopic focal plane array and method of making same

A semiconductor material emitting device is positioned such that its output flux impinges on a substrate at a non-perpendicular angle, so as to grow a first epilayer which is linearly graded in the direction perpendicular to the growth direction. The linear grading can be arranged such that, for example, each row of pixels has a different cutoff wavelength, thereby making it possible to provide a spectroscopic FPA without the use of filters. The non-perpendicular angle and/or the flux intensity can be adjusted to achieve a desired compositional grading. A spectral ellipsometer may be used to monitor the composition of the epilayer during the fabrication process, and to control the intensity of the flux.

III-nitride material semiconductor structures on conductive silicon substrates

III-nitride materials are described herein, including material structures comprising III-nitride material regions (e.g., gallium nitride material regions). In certain cases, the material structures also comprise substrates having relatively high electrical conductivities. Certain embodiments include one or more features that reduce the degree to which thermal runaway occurs, which can enhance device performance including at elevated flange temperatures. Some embodiments include one or more features that reduce the degree of capacitive coupling exhibited during operation. For example, in some embodiments, relatively thick III-nitride material regions and/or relatively small ohmic contacts are employed.

High electron mobility transistor device and methods for forming the same

A high electron mobility transistor device includes a substrate, a plurality of pairs of alternating layers, at least one stress-relief layer and a gallium nitride layer. The plurality of pairs of alternating layers is disposed over the substrate, and each pair of alternating layers includes a carbon-doped gallium nitride layer and an undoped gallium nitride layer. The stress-relief layer is disposed between the pairs of alternating layers. The gallium nitride layer is disposed over the alternating layers.