Disclosed herein are a III-N semiconductor structure manufactured by growing a III-N material on a superlattice structure layer, formed of AlGaN and InAlN materials, which serves as a buffer layer, and a method for manufacturing the same. The disclosed III-N semiconductor structure includes: a substrate including a silicon material; a seed layer formed on the substrate and including an aluminum nitride (AlN) material; a superlattice structure layer formed by sequentially depositing a plurality of superlattice units on the seed layer; and a cap layer formed on the superlattice structure layer and including a gallium nitride (GaN) material, wherein the superlattice units are each composed of a first layer including an AlxGa1-xN wherein 0≤x≤1 and a second layer including an InyAl1-yN wherein 0y≤0.4.

The present disclosure provides a non-planar hole channel transistor and a fabrication method thereof. The non-planar hole channel transistor has a substrate, and a surface of the substrate has a step structure comprising a vertical surface. A non-planar channel layer is epitaxially grown laterally with the vertical surface as a core. A barrier layer is formed on the channel layer, so as to simultaneously form a two-dimensional hole gas and/or a two-dimensional electron gas at an interface between the barrier layer and the channel layer.

A system and method for performing is laser induced forward transfer (LIFT) of 2D materials is disclosed. The method includes generating a receiver substrate, generating a donor substrate, wherein the donor substrate comprises a back surface and a front surface, applying a coating to the front surface, wherein the coating includes donor material, aligning the front surface of the donor substrate to be parallel to and facing the receiver substrate, wherein the donor material is disposed adjacent to the target layer, and irradiating the coating through the back surface of the donor substrate with one or more laser pulses produced by a laser to transfer a portion of the donor material to the target layer. The donor material may include Bi.sub.2S.sub.3-xS.sub.x, MoS.sub.2, hexagonal boron nitride (h-BN) or graphene. The method may be used to create touch sensors and other electronic components.

An integrated circuit structure comprises a relaxed buffer stack that includes a channel region, wherein the relaxed buffer stack and the channel region include a group III-N semiconductor material, wherein the relaxed buffer stack comprises a plurality of AlGaN material layers and a buffer stack is located over over the plurality of AlGaN material layers, wherein the buffer stack comprises the group III-N semiconductor material and has a thickness of less than approximately 25 nm. A back barrier is in the relaxed buffer stack between the plurality of AlGaN material layers and the buffer stack, wherein the back barrier comprises an AlGaN material of approximately 2-10% Al. A polarization stack over the relaxed buffer stack.

Semiconductor device structures and methods for manufacturing the same are provided. The semiconductor device structure includes a substrate, a first layer and a second layer. The first layer is disposed on and in contact with the substrate. The first layer includes Al.sub.X1Ga.sub.(1-X1)N, wherein 0.5≤X1<1. The second layer is disposed on and in contact with the first layer. The second layer includes Al, Ga and N.

A method for manufacturing a semiconductor element of the present disclosure includes: a step of preparing a substrate; a first element forming step of forming a first semiconductor layer in a first region on a surface of the substrate; a first element separating step of separating the first semiconductor layer from the substrate; and a second element forming step of forming a second semiconductor layer in a second region on the surface of the substrate from which the first semiconductor layer is separated. Additionally, in the method for manufacturing a semiconductor element of the present disclosure, at least a portion of the second region overlaps the first region.

The present invention provides a semiconductor device, comprising: a substrate (10); a stack of III-nitride transition layers (11) disposed on the substrate (10), the stack of III-nitride transition layers (11) maintaining an epitaxial relationship to the substrate (10); a first III-nitride layer (121) disposed on the stack of III-nitride transition layers (11); and a second III-nitride layer (122) disposed on the first III-nitride layer (121), the second III-nitride layer (122) having a band gap energy greater than that of the first III-nitride layer (121), wherein the stack of III-nitride transition layers (11) comprises a first transition layer (111), a second transition layer (112) on the first transition layer (111), and a third transition layer (113) on the second transition layer (112), and wherein the second transition layer (112) has a minimum aluminium molar ratio among the first transition layer (111), the second transition layer (112) and third transition layer (113). The present invention also relates to a method of forming such semiconductor device. The semiconductor device according to the present invention advantageously has a dislocation density less than or equal to 1×10.sup.9 cm.sup.−2 in the first III-nitride layer (121).

A III-nitride-based semiconductor device is provided. The III-nitride semiconductor device includes a silicon substrate having a surface with a periodic array of recesses formed therein. A discontinuous insulating layer is formed within each recess of the periodic array of recesses such that a portion of the silicon substrate surface between adjacent recesses is free from coverage of the discontinuous insulating layer. A first epitaxial III-nitride semiconductor layer is formed over the silicon substrate with the periodic array of recesses and discontinuous insulating layer formed thereon. A second III-nitride semiconductor layer is disposed over the first III-nitride semiconductor layer and has a bandgap greater than a bandgap of the first III-nitride semiconductor layer. At least one source and at least one drain are disposed over the second III-nitride semiconductor layer. A gate is also disposed over the second III-nitride semiconductor layer between the source and the drain.

A semiconductor device includes a nucleation layer, a buffer layer, a first nitride-based semiconductor layer, a second nitride-based semiconductor layer, S/D electrodes, and a gate electrode. The nucleation layer includes a composition that includes a first element. The buffer layer includes a III-V compound which includes the first element. The buffer layer is disposed on and forms an interface with the nucleation layer. The buffer layer has a concentration of the first element oscillating within the buffer layer, such that the concentration of the first element varies as an oscillating function of a distance within a thickness of the buffer layer. Spacings among adjacent peaks of the oscillating function change from wide to narrow with respect to a first reference point within the buffer layer. The first and second nitride-based semiconductor layer, S/D electrodes, and a gate electrode are disposed on the buffer layer.

A semiconductor structure includes a substrate. The semiconductor structure further includes a buffer layer over the substrate, wherein the buffer layer comprises a plurality of III-V layers, and a dopant type of each III-V layer of the plurality of III-V layers is opposite to a dopant of adjacent III-V layers of the plurality of III-V layers. The semiconductor structure further includes an active layer over the buffer layer. The semiconductor structure further includes a dielectric layer over the active layer.