Patent classifications
H01L21/02562
DEVICES AND METHODS FEATURING THE ADDITION OF REFRACTORY METALS TO CONTACT INTERFACE LAYERS
Disclosed embodiments include CdS/CdTe PV devices (100) having a back contact (110,112) with oxygen gettering capacity. Also disclosed are back contact structures (110, 112) and methods of forming a back contact in a CdS/CdTe PV device (100). The described contacts and methods feature a contact having a contact interface layer (100) comprising a contact interface material, a p-type dopant and a gettering metal.
INTEGRATED VERTICAL NANOWIRE MEMORY
A nanowire structure includes successive crystalline nanowire segments formed over a semiconductor substrate. A first crystalline segment formed directly on the semiconductor substrate provides electrical isolation between the substrate and the second crystalline segment. Second and fourth crystalline segments are each formed from a p-type or an n-type semiconductor material, while the third crystalline segment is formed from a semiconductor material that is oppositely doped with respect to the second and fourth crystalline segments.
Vapor transport deposition method and system for material co-deposition
An improved feeder system and method for continuous vapor transport deposition that includes at least two vaporizers coupled to a common distributor through an improved seal for separately vaporizing and collecting at least any two vaporizable materials for deposition as a material layer on a substrate. Multiple vaporizers provide redundancy and allow for continuous deposition during vaporizer maintenance and repair.
Methods of growing CdTe-based materials at high rates
Systems and methods for growing high-quality CdTe-based materials at high growth rates are provided. According to an aspect of the invention, a method includes depositing a first CdTe-based layer on a CdTe-based template at a rate of greater than 1 m/min. Each of the first CdTe-based layer and the CdTe-based template has a single-crystal structure and/or a large-grain polycrystalline structure. The depositing is performed by physical vapor deposition.
HALOMETALLATE LIGAND-CAPPED SEMICONDUCTOR NANOCRYSTALS
Halometallate-capped semiconductor nanocrystals and methods for making the halometallate-capped semiconductor nanocrystals are provided. Also provided are methods of using solutions of the halometallate-capped semiconductor nanocrystals as precursors for semiconductor film formation. When solutions of the halometallate ligand-capped semiconductor nanocrystals are annealed, the halometallate ligands can act as grain growth promoters during the sintering of the semiconductor nanocrystals.
SEMICONDUCTOR NANOPARTICLE DISPERSION, FOR A PHOTOELECTRIC CONVERSION LAYER, AND IMAGE PICKUP DEVICE
A semiconductor nanoparticle dispersion is provided. The semiconductor nanoparticle including a plurality of semiconductor nanoparticles having a radius equal to or larger than an exciton Bohr radius; and a solvent dispersed with the plurality of semiconductor nanoparticles.
FABRICATION AND USE OF LARGE-GRAIN TEMPLATES FOR EPITAXIAL DEPOSITION OF SEMICONDUCTOR MATERIALS
Methods for growing and using large-grain templates are provided. According to an aspect of the invention, a method includes depositing a small-grain layer of a semiconductor material; treating the small-grain layer such that the small-grain layer becomes a large-grain layer; and growing an epitaxial layer of the semiconductor material on the large-grain layer. A ratio of an average grain size of the small-grain layer to a thickness of the small-grain layer is less than 1.0, and a ratio of an average grain size of the large-grain layer to a thickness of the large-grain layer is greater than 1.5.
Methods of Growing CdTe-Based Materials At High Rates
Systems and methods for growing high-quality CdTe-based materials at high growth rates are provided. According to an aspect of the invention, a method includes depositing a first CdTe-based layer on a CdTe-based template at a rate of greater than 1 m/min. Each of the first CdTe-based layer and the CdTe-based template has a single-crystal structure and/or a large-grain polycrystalline structure. The depositing is performed by physical vapor deposition.
Heat treatment method and the product prepared therefrom
The present invention provides a heat treatment method, particularly a heat treatment method in which a protective layer is directly applied onto a precursor to ensure that the precursor on each portion of the substrate is treated based on substantially the same conditions so that the quality of the prepared product layer is improved. The method of the present invention comprises: (1) providing a substrate; (2) applying a precursor onto the surface of the substrate; (3) covering the precursor-applied substrate with a protective layer to bring the substrate and the protective layer into direct contact; (4) placing the substrate obtained from step (3) into a heat chamber for heat treatment; and (5) removing the protective layer. A product prepared by said heat treatment method is also provided.
Integrated vertical nanowire memory
A nanowire structure includes successive crystalline nanowire segments formed over a semiconductor substrate. A first crystalline segment formed directly on the semiconductor substrate provides electrical isolation between the substrate and the second crystalline segment. Second and fourth crystalline segments are each formed from a p-type or an n-type semiconductor material, while the third crystalline segment is formed from a semiconductor material that is oppositely doped with respect to the second and fourth crystalline segments.