The present disclosure describes a method to form silicon germanium (SiGe) source/drain epitaxial stacks with a boron doping profile and a germanium concentration that can induce external stress to a fully strained SiGe channel. The method includes forming one or more gate structures over a fin, where the fin includes a fin height, a first sidewall, and a second sidewall opposite to the first sidewall. The method also includes forming a first spacer on the first sidewall of the fin and a second spacer on the second sidewall of the fin; etching the fin to reduce the fin height between the one or more gate structures; and etching the first spacer and the second spacer between the one or more gate structures so that the etched first spacer is shorter than the etched second spacer and the first and second etched spacers are shorter than the etched fin. The method further includes forming an epitaxial stack on the etched fin between the one or more gate structures.

In a method of manufacturing a semiconductor device, a gate structure is formed over a fin structure. A source/drain region of the fin structure is recessed. A first semiconductor layer is formed over the recessed source/drain region. A second semiconductor layer is formed over the first semiconductor layer. The fin structure is made of Si.sub.xGe.sub.1-x, where 0≤x≤0.3, the first semiconductor layer is made of Si.sub.yGe.sub.1-y, where 0.45≤y≤1.0, and the second semiconductor layer is made of Si.sub.zGe.sub.1-z, where 0≤z≤0.3.

A film formation apparatus includes a stage, a heater, a mist supply source, a superheated vapor supply source, and a delivery device. The stage is configured to allow a substrate to be mounted thereon. The heater is configured to heat the substrate. The mist supply source is configured to supply mist of a solution that comprises solvent and a film material dissolved in the solvent. The superheated vapor supply source is configured to supply a superheated vapor of a same material as the solvent. The delivery device is configured to deliver the mist and the superheated vapor toward a surface of the substrate to grow a film containing the film material on the surface of the substrate.

A method includes forming a silicon liner over a semiconductor device, which includes a dummy gate structure disposed over a substrate and S/D features disposed adjacent to the dummy gate structure, where the dummy gate structure traverses a channel region between the S/D features. The method further includes forming an ILD layer over the silicon liner, which includes elemental silicon, introducing a dopant species to the ILD layer, and subsequently removing the dummy gate structure to form a gate trench. Thereafter, the method proceeds to performing a thermal treatment to the doped ILD layer, thereby oxidizing the silicon liner, and forming a metal gate stack in the gate trench and over the oxidized silicon liner.

A nitride semiconductor structure includes a Group III nitride semiconductor portion and a Group II-IV nitride semiconductor portion. The Group III nitride semiconductor portion is single crystalline. The Group III nitride semiconductor portion has a predetermined crystallographic plane. The Group II-IV nitride semiconductor portion is provided on the predetermined crystallographic plane of the Group III nitride semiconductor portion. The Group II-IV nitride semiconductor portion is single crystalline. The Group II-IV nitride semiconductor portion contains a Group II element and a Group IV element. The Group II-IV nitride semiconductor portion forms a heterojunction with the Group III nitride semiconductor portion. The predetermined crystallographic plane is a crystallographic plane other than a (0001) plane.

A method of fabricating a device includes providing a fin extending from a substrate in a device type region, where the fin includes a plurality of semiconductor channel layers. In some embodiments, the method further includes forming a gate structure over the fin. Thereafter, in some examples, the method includes removing a portion of the plurality of semiconductor channel layers within a source/drain region adjacent to the gate structure to form a trench in the source/drain region. In some cases, the method further includes after forming the trench, depositing an adhesion layer within the source/drain region along a sidewall surface of the trench. In various embodiments, and after depositing the adhesion layer, the method further includes epitaxially growing a continuous first source/drain layer over the adhesion layer along the sidewall surface of the trench.

There is provided a technique that includes: (a) forming a silicon seed layer on a substrate by performing a cycle a predetermined number of times, the cycle including non-simultaneously performing: (a1) supplying a first gas containing halogen and silicon to the substrate; and (a2) supplying a second gas containing hydrogen to the substrate; and (b) forming a film containing silicon on the silicon seed layer by supplying a third gas containing silicon to the substrate, wherein a pressure of a space in which the substrate is located in (a2) is set higher than a pressure of the space in which the substrate is located in (a1).

Provided is a susceptor which makes it possible to increase the circumferential flatness uniformity of an epitaxial layer of an epitaxial silicon wafer. A susceptor 100 is provided with a concave counterbore portion on which a silicon wafer W is placed, and the radial distance L between the center of the susceptor and an opening edge of the counterbore portion varies at 90° periods in the circumferential direction. Meanwhile, when the angle at which the radial distance L is minimum is 0°, the radial distance L is a minimum value L.sub.1 at 90°, 180°, and 270°; and the radial distance L is a maximum value L.sub.2 at 45°, 135°, 225°, and 315°. Accordingly, the pocket width L.sub.p also varies in conformance with the variations of the radial distance L. The opening edge 110C describes four elliptical arcs being convex radially outward when the susceptor 100 is viewed from above.

A method for manufacturing a semiconductor device includes forming a plurality of semiconductor layers on a semiconductor substrate, and forming a plurality of gate structures spaced apart from each other on the semiconductor layers. The semiconductor layers are patterned into a plurality of patterned stacks spaced apart from each other, wherein the plurality of patterned stacks are under the plurality of gate structures. The method also includes forming a plurality of sacrificial spacers on lateral sides of the plurality of gate structures, and growing a plurality of source/drain regions. The source/drain regions are adjacent the patterned stacks and include a plurality of pillar portions formed on lateral sides of the sacrificial spacers. The sacrificial spacers and the plurality of pillar portions are removed.

Method for filling a gap, comprising providing in a deposition chamber a semiconductor substrate having a gap, wherein a bottom of the gap includes a crystalline semiconducting material and wherein a side wall of the gap includes an amorphous material; depositing a silicon precursor in the gap.