H01L21/02581

HIGH ELECTRON MOBILITY TRANSISTOR (HEMT) DEVICE AND METHOD OF FORMING SAME
20210226040 · 2021-07-22 ·

A high electron mobility transistor (HEMT) device and a method of forming the same are provided. The method includes forming a first III-V compound layer over a substrate. A second III-V compound layer is formed over the first III-V compound layer. The second III-V compound layer has a greater band gap than the first III-V compound layer. A third III-V compound layer is formed over the second III-V compound layer. The third III-V compound layer and the first III-V compound layer comprise a same III-V compound. A passivation layer is formed along a topmost surface and sidewalls of the third III-V compound layer. A fourth III-V compound layer is formed over the second III-V compound layer. The fourth III-V compound layer has a greater band gap than the first III-V compound layer.

SEMICONDUCTOR STRUCTURE AND MANUFACTURING METHOD THEREFOR
20210257214 · 2021-08-19 ·

Embodiments of the present application provide a semiconductor structure and a manufacturing method therefor. A buffer layer is disposed on a substrate layer, and the buffer layer includes a first buffer layer and a second buffer layer. By doping a transition metal in the first buffer layer, a deep level trap may be formed to capture background electrons, and diffusion of free electrons toward the substrate may also be avoided. By decreasing a doping concentration of the transition metal in the second buffer layer, a tailing effect is avoided and current collapse is prevented. By doping periodically the impurity in the buffer layer, the impurity may be as an acceptor impurity to compensate the background electrons, and then a concentration of the background electrons is reduced. By using the periodic doping method, dislocations, caused by doping, in the buffer layer may be effectively reduced.

Doped metal-chalcogenide thin film and method of manufacturing the same

A method of manufacturing a doped metal chalcogenide thin film includes depositing a dopant atom on a base material; and forming a doped metal chalcogenide thin film on the dopant atom-deposited base material by supplying heat and a reaction gas comprising a metal precursor and a chalcogen precursor to the dopant atom-deposited base material.

DISPLAY DEVICE
20230402018 · 2023-12-14 ·

A display device that is suitable for increasing in size is achieved. Three or more source lines are provided for each pixel column. Video signals having the same polarity are input to adjacent source lines during one frame period. Dot inversion driving is used to reduce a flicker, crosstalk, or the like.

Crystalline multilayer structure and semiconductor device
11038026 · 2021-06-15 · ·

Provided is a crystalline multilayer structure having good semiconductor properties. The crystalline multilayer structure includes a base substrate and a corundum-structured crystalline oxide semiconductor thin film disposed directly on the base substrate or with another layer therebetween. The crystalline oxide semiconductor thin film is 0.1 μm or less in a surface roughness (Ra).

Crystal laminate structure

[Problem] To provide a crystal laminate structure having a β-Ga.sub.2O.sub.3 based single crystal film in which a dopant is included throughout the crystal and the concentration of the dopant can be set across a broad range. [Solution] In one embodiment of the present invention, provided is a crystal laminate structure 1 which includes: a Ga.sub.2O.sub.3 based substrate 10; and a β-Ga.sub.2O.sub.3 based single crystal film 12 formed by epitaxial crystal growth on a primary face 11 of the Ga.sub.2O.sub.3 based substrate 10 and including Cl and a dopant doped in parallel with the crystal growth at a concentration of 1×10.sup.13 to 5.0×10.sup.20 atoms/cm.sup.3.

Unknown
20210193907 · 2021-06-24 ·

Method for manufacturing a thin layer of textured AlN comprising the following successive steps: a) providing a substrate having an amorphous surface, b) forming a polycrystalline nucleation layer of MS.sub.2 with M=Mo, W or one of the alloys thereof, on the amorphous surface of the substrate, the polycrystalline nucleation layer consisting of crystalline domains the base planes of which are parallel to the amorphous surface of the substrate, the crystalline domains being oriented randomly in an (a, b) plane formed by the amorphous surface of the substrate, c) depositing aluminum nitride on the nucleation layer, leading to the formation of a thin layer of textured AlN.

OXYGEN VACANCY OF AMORPHOUS INDIUM GALLIUM ZINC OXIDE PASSIVATION BY SILICON ION TREATMENT

Methods and apparatus for forming a thin film transistor (TFT) having a metal oxide layer. The method may include forming an amorphous metal oxide layer and treating the metal oxide layer with a silicon containing gas or plasma including Si.sup.4+ ions. The silicon treatment of the metal oxide layer helps fill the oxygen vacancies in the metal oxide channel layer, leading to a more stable TFT and preventing a negative threshold voltage in the TFT.

SEMICONDUCTOR STRUCTURE AND FORMING METHOD THEREOF
20210193820 · 2021-06-24 ·

The present disclosure provides a semiconductor structure and a forming method thereof. The semiconductor structure includes: a substrate and an epitaxial layer disposed on the substrate. At least a part of the epitaxial layer is doped with metal atoms, and the doping concentration of the metal atoms at the bottom surface of the epitaxial layer near the substrate is larger than 1×10.sup.17 atoms/cm.sup.3.