Patent classifications
H01L21/02581
Doped diamond Semiconductor and method of manufacture using laser ablation
A doped diamond semiconductor and method of production using a laser is disclosed herein. As disclosed, a dopant and/or a diamond or sapphire seed material may be added to a graphite based ablative layer positioned below a confinement layer, the ablative layer also being graphite based and positioned above a backing layer, to promote formation of diamond particles having desirable semiconductor properties via the action of a laser beam upon the ablative layer. Dopants may be incorporated into the process to activate the reaction sought to produce a material useful in production of a doped semiconductor or a doped conductor suitable for the purpose of modulating the electrical, thermal or quantum properties of the material produced. As disclosed, the diamond particles formed by either the machine or method of confined pulsed laser deposition disclosed may be arranged as semiconductors, electrical components, thermal components, quantum components and/or integrated circuits.
Rare-Earth Doped Semiconductor Material, Thin-Film Transistor, and Application
Disclosed in the present invention is a rare-earth doped semiconductor material. Compounds of two rare-earth elements R and R′ having different functions are introduced into an indium oxide containing material. The coupling of R element ions to an O2p orbit can effectively enhance the transfer efficiency of the rare-earth R′ as a photogenerated electron transfer center, such that the light stability of a device with a small amount of R′ doping can be achieved. Compared with single rare-earth element R′ doping, due to less doping, the impact on a mobility is less, such that higher mobility and light stability devices can be obtained. Further provided in the present invention is a semiconductor-based thin-film transistor, and an application.
Film forming method and crystalline multilayer structure
The disclosure provides a film forming method that enables to obtain an epitaxial film with reduced defects such as dislocations due to a reduced facet growth industrially advantageously, even if the epitaxial film has a corundum structure. When forming an epitaxial film on a crystal-growth surface of a corundum-structured crystal substrate directly or via another layer, using the crystal substrate having an uneven portion on the crystal-growth surface of the crystal substrate, generating and floating atomized droplets by atomizing a raw material solution including a metal; carrying the floated atomized droplets onto a surface of the crystal substrate by using a carrier gas; and causing a thermal reaction of the atomized droplets in a condition of a supply rate limiting state.
LIGHT-EMITTING DEVICE AND METHOD OF MANUFACTURING LIGHT-EMITTING DEVICE
A light-emitting device according to an embodiment of the present disclosure includes: a semiconductor stack in which a first light reflection layer configured by an arsenic-based semiconductor layer including carbon as an impurity, an active layer, and a second light reflection layer are stacked; a first buffer layer provided on the first light reflection layer side of the semiconductor stack, having one face that faces the semiconductor stack and another face that is on an opposite side of the one face, and configured by a phosphorus-based semiconductor layer; and a second buffer layer provided at least between the first light reflection layer and the first buffer layer, and configured by an arsenic-based semiconductor layer including zinc or magnesium as an impurity.
Epitaxial oxide field effect transistor
The present disclosure describes epitaxial oxide field effect transistors (FETs). In some embodiments, a FET comprises: a substrate comprising an oxide material; an epitaxial semiconductor layer on the substrate; a gate layer on the epitaxial semiconductor layer; and electrical contacts. In some cases, the epitaxial semiconductor layer can comprise a superlattice comprising a first and a second set of layers comprising oxide materials with a first and second bandgap. The gate layer can comprise an oxide material with a third bandgap, wherein the third bandgap is wider than the first bandgap. In some cases, the epitaxial semiconductor layer can comprise a second oxide material with a first bandgap, wherein the second oxide material comprises single crystal A.sub.xB.sub.1-xO.sub.n, wherein 0<x<1.0, wherein A is Al and/or Ga, wherein B is Mg, Ni, a rare earth, Er, Gd, Ir, Bi, or Li.
SUPERLATTICE STRUCTURE
A superlattice structure includes a substrate. A first superlattice stack is disposed on the substrate. The first superlattice stack includes a first superlattice layer, a second superlattice layer and a third superlattice layer disposed from bottom to top. Three stress relaxation layers respectively disposed between the first superlattice layer and the second superlattice layer, the second superlattice layer and the third superlattice layer and on the third superlattice layer. Each of the stress relaxation layers includes a group III-V compound layer. The thickness of each of the stress relaxation layers should be greater than a relaxation critical thickness.
SEMICONDUCTOR SUBSTRATE WITH BALANCED STRESS
Provided is a semiconductor substrate with a balance stress. The semiconductor substrate includes a ceramics base, a nucleation layer and a first buffer layer doped with a first dopant. The ceramics base has an off-cut angle other than 0 degree. The nucleation layer is disposed on the ceramics base. The first buffer layer is disposed on the nucleation layer. The first dopant includes C, Fe or a combination thereof. The first buffer layer provides compressive stress to the ceramic base. The concentration of the first dopant in the first buffer layer is increased away from the ceramics base. The curvature of the semiconductor substrate is between 16 km.sup.−1 and −16 km.sup.−1.
Nitride semiconductor laminate, semiconductor device, method of manufacturing nitride semiconductor laminate, method of manufacturing nitride semiconductor free-standing substrate and method of manufacturing semiconductor device
A nitride semiconductor laminate includes: a substrate comprising a group III nitride semiconductor and including a surface and a reverse surface, the surface being formed from a nitrogen-polar surface, the reverse surface being formed from a group III element-polar surface and being provided on the reverse side from the surface; a protective layer provided at least on the reverse surface side of the substrate and having higher heat resistance than the reverse surface of the substrate; and a semiconductor layer provided on the surface side of the substrate and comprising a group III nitride semiconductor. The concentration of O in the semiconductor layer is lower than 1×10.sup.17 at/cm.sup.3.
Epitaxial structure of GaN-based radio frequency device based on Si substrate and its manufacturing method
An epitaxial structure of a GaN-based radio frequency device based on a Si substrate and a manufacturing method thereof are provided. The epitaxial structure is composed of a Si substrate (1), an AlN nucleation layer (2), AlGaN buffer layers (3, 4, 5), a GaN:Fe/GaN high-resistance layer (6), a GaN superlattice layer (7), a GaN channel layer (8), an AlGaN barrier layer (9) and a GaN cap layer (10) which are stacked in turn from bottom to top, wherein the GaN:Fe/GaN high-resistance layer (6) is composed of an intentional Fe-doped GaN layer and an unintentional doped GaN layer which are alternately connected; the GaN superlattice layer (7) is composed of a low-pressure/low V/III ratio GaN layer and a high-pressure/high V/III ratio GaN layer which are periodically and alternately connected.
Epitaxial oxide high electron mobility transistor
The present disclosure describes epitaxial oxide high electron mobility transistors (HEMTs). In some embodiments, a HEMT comprises: a substrate; a template layer on the substrate; a first epitaxial semiconductor layer on the template layer; and a second epitaxial semiconductor layer on the first epitaxial semiconductor layer. The template layer can comprise crystalline metallic Al(111). The first epitaxial semiconductor layer can comprise (Al.sub.xGa.sub.1-x).sub.yO.sub.z, wherein 0≤x≤1, 1≤y≤3, and 2≤z≤4, wherein the (Al.sub.xGa.sub.1-x).sub.yO.sub.z comprises a Pna21 space group, and wherein the (Al.sub.xGa.sub.1-x).sub.yO.sub.z comprises a first conductivity type formed via polarization. The second epitaxial semiconductor layer can comprise a second oxide material.