A method to form a 2-Dimensional transistor channel may include depositing an amorphous layer comprising a 2-dimensional material, implanting an implant species into the amorphous layer; and annealing the amorphous layer after the implanting. As such, the amorphous layer may form a doped crystalline layer.

Methods for forming a doped metal oxide film on a substrate by cyclical deposition are provided. In some embodiments, methods may include contacting the substrate with a first reactant comprising a metal halide source, contacting the substrate with a second reactant comprising a hydrogenated source and contacting the substrate with a third reactant comprising an oxide source. In some embodiments, related semiconductor device structures may include a doped metal oxide film formed by cyclical deposition processes.

To provide a method of depositing a silicon film that can crystallize the silicon film at low temperature and in a short time, and also can deposit the silicon film with high flatness. A method of depositing a silicon film includes supplying a silicon-containing gas on a seed layer, depositing an amorphous silicon film on the seed layer, supplying chlorosilane gas to the amorphous silicon film, and crystallizing the amorphous silicon film while forming a chlorosilane cap layer on the amorphous silicon film.

A method of crystallizing an amorphous silicon film includes depositing the amorphous silicon film on a seed layer formed over a substrate while heating the amorphous silicon film at a first temperature, and forming a crystal nucleus in an outer layer of the amorphous silicon film by causing migration of silicon in the outer layer by heating the amorphous silicon film at a second temperature higher than the first temperature.

Exemplary methods of semiconductor processing may include flowing a silicon-containing precursor into a processing region of a semiconductor processing chamber. A substrate may be housed within the processing region, and the substrate may be maintained at a temperature below or about 450° C. The methods may include striking a plasma of the silicon-containing precursor. The methods may include forming a layer of amorphous silicon on a semiconductor substrate. The layer of amorphous silicon as-deposited may be characterized by less than or about 3% hydrogen incorporation.

A thin film formation apparatus includes a chamber, a platen disposed within the chamber, a heater configured to heat the platen within the chamber, a gas inlet communicating with an interior of the chamber and configured to supply a reducing gas and inert gas to the interior of the chamber, a target disposed within the chamber and spatially separated from the platen, and a microwave plasma source disposed adjacent to the target. The reducing gas includes at least one of hydrogen (H.sub.2) and deuterium (D.sub.2).

Embodiments of the present invention are directed to fabrication method and resulting structures for vertical tunneling field effect transistors (VFETs) having a dual liner bottom spacer. In a non-limiting embodiment of the invention, a first liner is formed on a top surface of a source or drain (S/D) region and sidewalls of a semiconductor fin. Portions of a spacer are removed to expose a first region and a second region of the first liner. The first region of the first liner is directly on the S/D region and the second region is over the semiconductor fin. A second liner is formed on the first liner. A first portion of the second liner is formed by selectively depositing dielectric material on the exposed first region and exposed second region of the first liner. The first liner and the second liner collectively define the dual liner bottom spacer.

In some embodiments, a method of processing a substrate disposed atop a substrate support in a physical vapor deposition process chamber includes: (a) forming a plasma from a process gas within a processing region of the physical vapor deposition chamber, wherein the process gas comprises an inert gas to sputter silicon from a surface of a target within the processing region of the physical vapor deposition chamber; and (b) depositing an amorphous silicon layer atop a first layer on the substrate, wherein the first layer comprises one or more metal oxides of indium (In), gallium (Ga), zinc (Zn), tin (Sn) or combinations thereof.

The present invention relates to a method for forming an amorphous silicon thin film, a method for manufacturing a semiconductor device including the same, and a semiconductor device manufactured thereby. The present invention discloses a method for forming an amorphous silicon thin film, wherein the method includes a first step (S10) of providing a first gas containing silicon and a second gas containing nitrogen on a substrate (100) to form a first amorphous silicon layer (310b), and a second step (S20) of providing a first gas containing silicon on the substrate (100) having the first amorphous silicon layer (310b) formed thereon to form a second amorphous silicon layer (300a).

A method for forming layers with silicon is disclosed. The layers may be created by positioning a substrate within a processing chamber, heating the substrate to a first temperature between 300 and 500° C. and introducing a first precursor into the processing chamber to deposit a first layer. The substrate may be heated to a second temperature between 400 and 600° C.; and, a second precursor may be introduced into the processing chamber to deposit a second layer. The first and second precursor may comprise silicon atoms and the first precursor may have more silicon atoms per molecule than the second precursor.