H01L21/02606

Integration of heat spreader for beol thermal management

A microelectronic device includes a heat spreader layer on an electrode of a component and a metal interconnect on the heat spreader layer. The heat spreader layer is disposed above a top surface of a substrate of the semiconductor device. The heat spreader layer is 100 nanometers to 3 microns thick, has an in-plane thermal conductivity of at least 150 watts/meter- K, and an electrical resistivity less than 100 micro-ohm-centimeters.

SEMICONDUCTOR DEVICE
20190319137 · 2019-10-17 ·

A semiconductor device includes a first PMOS transistor, a first NMOS transistor, and a second NMOS transistor connected to an output node of the first PMOS and NMOS transistors. The first PMOS transistor includes first nanowires, first source and drain regions on opposite sides of each first nanowire, and a first gate completely surrounding each first nanowire. The first NMOS transistor includes second nanowires, second source and drain regions on opposite sides of each second nanowire, and a second gate extending from the first gate and completely surrounding each second nanowire. The second NMOS transistor includes third nanowires, third source and drain regions on opposite sides of each third nanowire, and a third gate, separated from the first and second gates, and completely surrounding each third nanowire. A number of third nanowires is greater than that of first nanowires. The first and second gates share respective first and second nanowires.

Static random access memory (SRAM) device for improving electrical characteristics and logic device including the same

A static random access memory (SRAM) device includes a circuit element that includes a first inverter having a first load transistor and a first drive transistor and a second inverter having a second load transistor and a second drive transistor. Input and output nodes of the first inverter and the second inverter are cross-connected to each other. A first transfer transistor is connected to the output node of the first inverter, and a second transfer transistor is connected to the output nodes of the second inverter. Each of the first and second load transistors, the first and second drive transistors, and the first and second transfer transistors includes a transistor having multi-bridge channels. At least one of the first and second load transistors, the first and second drive transistors, and the first and second transfer transistors includes a transistor having a different number of multi-bridge channels from the other transistors.

Undercut control in isotropic wet etch processes

A method for manufacturing a semiconductor device includes forming a first nanosheet device and forming a second nanosheet device spaced apart from the first nanosheet device in respective first and second regions corresponding to first and second types. The first and second nanosheet devices respectively include a first and a second plurality of work function metal layers, and a work function metal layer extends from the first and second plurality of work function metal layers in the space between the nanosheet devices. In the method, part of the work function metal layer is removed from the space between the nanosheet devices, and the removed part of the work function metal layer is replaced with a polymer brush layer. The first plurality of work function metal layers is selectively removed from the first region with respect to the polymer brush layer.

Self-assembly of nanostructures

Structures and methods that include selective electrostatic placement based on a dipole-to-dipole interaction of electron-rich carbon nanotubes onto an electron-deficient pre-patterned surface. The structure includes a substrate with a first surface having a first isoelectric point and at least one additional surface having a second isoelectric point. A self-assembled monolayer is selectively formed on the first surface and includes an electron deficient compound including a deprotonated pendant hydroxamic acid or a pendant phosphonic acid group or a pendant catechol group bound to the first surface. An organic solvent can be used to deposit the electron rich carbon nanotubes on the self-assembled monolayer.

Epitaxial structure having nanotube film free of carbon nanotubes

The disclosure relates to an epitaxial structure. The epitaxial structure includes a substrate, an epitaxial layer, and a nanotube film. The substrate has an epitaxial growth surface. The epitaxial layer is located on the epitaxial growth surface of the substrate. The nanotube film is located between the substrate and the epitaxial layer. The nanotube film includes a number of nanotubes orderly arranged and combined with each other by ionic bonds.

GAS SENSOR WITH SUPERLATTICE STRUCTURE

A gas sensor has a microstructure sensing element which comprises a plurality of interconnected units wherein the units are formed of connected graphene tubes. The graphene tubes may be formed by photo-initiating the polymerization of a monomer in a pattern of interconnected units to form a polymer microlattice, removing unpolymerized monomer, coating the polymer microlattice with a metal, removing the polymer microlattice to leave a metal microlattice, depositing graphitic carbon on the metal microlattice, converting the graphitic carbon to graphene, and removing the metal microlattice.

LATERAL SEMICONDUCTOR NANOTUBE WITH HEXAGONAL SHAPE
20190198319 · 2019-06-27 ·

A method of forming a semiconductor structure includes forming one or more fins disposed on a substrate, rounding surfaces of the one or more fins, forming faceted sidewalls from the rounded surfaces of the one or more fins, and forming a lateral semiconductor nanotube shell on the faceted sidewalls. The lateral semiconductor nanotube shell comprises a hexagonal shape.

Purification of carbon nanotubes via selective heating

The present invention provides methods for purifying a layer of carbon nanotubes comprising providing a precursor layer of substantially aligned carbon nanotubes supported by a substrate, wherein the precursor layer comprises a mixture of first carbon nanotubes and second carbon nanotubes; selectively heating the first carbon nanotubes; and separating the first carbon nanotubes from the second carbon nanotubes, thereby generating a purified layer of carbon nanotubes. Devices benefiting from enhanced electrical properties enabled by the purified layer of carbon nanotubes are also described.

Method for making organic light emitting diode

A method for making an organic light emitting diode includes providing a preform structure including an anode electrode, a hole transport layer, and an organic light emitting layer stacked on each other in that order. The organic light emitting layer has a first surface and a second surface opposite to the first surface, and the second surface is in direct contact with the hole transport layer. A carbon nanotube structure is located on the first surface. A monomer solution is disposed on the carbon nanotube structure, and the monomer solution is formed by dispersing a monomer into an organic solvent. The monomer is polymerized to form a polymer, and a cathode electrode is formed on the polymer.