Patent classifications
H01L21/02653
Assembly for the Deposition of Silicon Nanostructures
An assembly for the deposition of silicon nanostructures comprising a deposition chamber, which is defined by a side wall and by two end walls; a microwave generator, which is adapted to generate microwaves inside the deposition chamber; an electromagnetic termination wall, made of a conductor material and reflecting the microwave radiation, which is such as to create a termination for a TE-mode waveguide and is housed inside the deposition chamber; and a substrate-carrier support, which is made of a dielectric material and on which the substrate is housed on which to perform the growth of silicon nanostructures. The substrate-carrier support is arranged inside the deposition chamber above the termination wall.
PRODUCTION OF SEMICONDUCTOR NANOWIRES DIRECTLY FROM SOLID PARTICLES
Disclosed is a process for producing semiconductor nanowires having a diameter or thickness from 2 nm to 100 nm, the process comprising: (A) preparing a semiconductor material particulate having a size from 50 nm to 500 m, selected from Ga, In, Ge, Sn, Pb, P, As, Sb, Bi, Te, a combination thereof, a compound thereof, or a combination thereof with Si; (B) depositing a catalytic metal, in the form of nanoparticles having a size from 1 nm to 100 nm or a coating having a thickness from 1 nm to 100 nm, onto surfaces of the semiconductor material particulate to form a catalyst metal-coated semiconductor material; and (C) exposing the catalyst metal-coated semiconductor material to a high temperature environment, from 100 C. to 2,500 C., for a period of time sufficient to enable a catalytic metal-assisted growth of multiple semiconductor nanowires from the particulate.
Shell-enabled vertical alignment and precision-assembly of a close-packed colloidal crystal film
A nanowire includes an electrically conductive catalyst nanoparticle first portion, a semiconductor wire second portion, a first dielectric shell around the first portion, and a second dielectric shell or functionalization around the second portion. A material of the second dielectric shell or functionalization is different from a material of the first shell.
Method of forming hybrid nanostructure on graphene, hybrid nanostructure, and device including the hybrid nanostructure
A method of forming a hybrid nanostructure on graphene, the method including providing a graphene layer on a substrate; forming a metal layer on the graphene layer; and chemically depositing a nanomaterial on the graphene layer on which the metal layer is formed to form the hybrid nanostructure.
Process for growing at least one nanowire using a transition metal nitride layer obtained in two steps
The process for growing at least one semiconductor nanowire (3), said growth process comprising a step of forming, on a substrate (1), a nucleation layer (2) for the growth of the nanowire (3) and a step of growth of the nanowire (3). The step of formation of the nucleation layer (2) comprises the following steps: deposition onto the substrate (1) of a layer of a transition metal (4) chosen from Ti, V, Cr, Zr, Nb, Mo, Hf, Ta; nitridation of at least a part (2) of the transition metal layer so as to form a transition metal nitride layer having a surface intended for growing the nanowire (3).
STRETCHABLE CRYSTALLINE SEMICONDUCTOR NANOWIRE AND PREPARATION METHOD THEREOF
This invention is about a stretchable crystalline semiconductor nanowire and a preparation method. The stretchable crystalline semiconductor nanowire has a long and thin main body, a diameter of the nanowire is between 20 to 200 nm, and the nanowire has a crystalline inorganic semiconductor structure. The stretchable crystalline semiconductor nanowire has a bending structure having a plurality of stretchable units disposed along an axial direction, and the stretchable units are connected sequentially to form the stretchable crystalline semiconductor nanowire. Since the nanowire and the guided channel cross-section can be effectively adjusted, stripping and transferring onto other flexible substrates can be further performed. The method of preparing a crystalline nanowire having a spring structure has broad prospects in applications related to the fields of flexible electronics and sensors.
FORMATION OF SINGLE CRYSTAL SEMICONDUCTORS USING PLANAR VAPOR LIQUID SOLID EPITAXY
A semiconductor device is provided. The semiconductor device includes a template layer disposed over a substrate and having a trench therein, a buffer structure disposed over a bottom surface of the trench and comprising a metal oxide, a single crystal semiconductor structure disposed within the trench and over the buffer structure and a gate structure disposed over a channel region of the single crystal semiconductor structure.
NANOWIRE BENDING FOR PLANAR DEVICE PROCESS ON (001) Si SUBSTRATES
Provided is a method for growing a nanowire, including: providing a substrate with a base portion having a first surface and at least one support structure extending above or below the first surface; forming a dielectric coating on the at least one support structure; forming a photoresist coating over the substrate; forming a metal coating over at least a portion of the dielectric coating; removing a portion of the dielectric coating to expose a surface of the at least one support structure; removing a portion of the at least one support structure to form a nanowire growth surface; growing at least one nanowire on the nanowire growth surface of a corresponding one of the at least one support structure, wherein the nanowire comprises a root end attached to the growth surface and an opposing, free end extending from the root end; and elastically bending the at least one nanowire.
Integrated circuits with selectively strained device regions and methods for fabricating same
Integrated circuits and methods for fabricating integrated circuits are provided. An exemplary method for fabricating an integrated circuit includes providing a substrate including a semiconductor layer over an insulator layer. The method includes selectively replacing portions of the semiconductor layer with insulator material to define an isolated semiconductor layer region. Further, the method includes selectively forming a relaxed layer on the isolated semiconductor layer region. Also, the method includes selectively forming a strained layer on the relaxed layer. The method forms a device over the strained layer.
Nanowire bending for planar device process on (001) Si substrates
Provided is a method for growing a nanowire, including: providing a substrate with a base portion having a first surface and at least one support structure extending above or below the first surface; forming a dielectric coating on the at least one support structure; forming a photoresist coating over the substrate; forming a metal coating over at least a portion of the dielectric coating; removing a portion of the dielectric coating to expose a surface of the at least one support structure; removing a portion of the at least one support structure to form a nanowire growth surface; growing at least one nanowire on the nanowire growth surface of a corresponding one of the at least one support structure, wherein the nanowire comprises a root end attached to the growth surface and an opposing, free end extending from the root end; and elastically bending the at least one nanowire.