Patent classifications
H01L21/02653
Methods of fabricating nanostructures and nanowires and devices fabricated therefrom
One-dimensional nanostructures having uniform diameters of less than approximately 200 nm. These inventive nanostructures, which we refer to as nanowires, include single-crystalline homostructures as well as heterostructures of at least two single-crystalline materials having different chemical compositions. Because single-crystalline materials are used to form the heterostructure, the resultant heterostructure will be single-crystalline as well. The nanowire heterostructures are generally based on a semiconducting wire wherein the doping and composition are controlled in either the longitudinal or radial directions, or in both directions, to yield a wire that comprises different materials. Examples of resulting nanowire heterostructures include a longitudinal heterostructure nanowire (LOHN) and a coaxial heterostructure nanowire (COHN).
Processes for shaping nanomaterials
Processes for shaping one- and two-dimensional nanomaterials, and thereby inducing local strains therein preferably to control one or more of their material properties. The processes include providing a substrate comprising a three-dimensional surface feature thereon, locating a nanomaterial on the substrate and over the surface feature, and directing a laser beam toward the nanomaterial such that the nanomaterial experiences laser shock pressure sufficient to deform the nanomaterial to conform at least partially to the shape of the surface feature and adhere to the surface feature either directly or via an intermediate layer therebetween.
DESIGN AND SYNTHESIS OF METAL OXIDE SURFACES AND INTERFACES WITH CRYSTALLOGRAPHIC CONTROL USING SOLID-LIQUID-VAPOR ETCHING AND VAPOR-LIQUID-SOLID GROWTH
The present invention provides integrated nanostructures comprising a single-crystalline matrix of a material A containing aligned, single-crystalline nanowires of a material B, with well-defined crystallographic interfaces are disclosed. The nanocomposite is fabricated by utilizing metal nanodroplets in two subsequent catalytic steps: solid-liquid-vapor etching, followed by vapor-liquid-solid growth. The first etching step produces pores, or negative nanowires within a single-crystalline matrix, which share a unique crystallographic direction, and are therefore aligned with respect to one another. Further, since they are contained within a single, crystalline, matrix, their size and spacing can be controlled by their interacting strain fields, and the array is easily manipulated as a single entityaddressing a great challenge to the integration of freestanding nanowires into functional materials. In the second, growth, step, the same metal nanoparticles are used to fill the pores with single-crystalline nanowires, which similarly to the negative nanowires have unique growth directions, and well-defined sizes and spacings. The two parts of this composite behave synergistically, since this nanowire-filled matrix contains a dense array of well-defined crystallographic interfaces, in which both the matrix and nanowire materials convey functionality to the material. The material of either one of these components may be chosen from a vast library of any material able to form a eutectic alloy with the metal in question, including but not limited to every material thus far grown in nanowire form using the ubiquitous vapor-liquid-solid approach. This has profound implications for the fabrication of any material intended to contain a functional interface, since high interfacial areas and high quality interfacial structure should be expected. Technologies to which this simple approach could be applied include but are not limited to p-n junctions of solar cells, battery electrode arrays, multiferroic materials, and plasmonic materials.
Electrical cell-substrate impedance sensor (ECIS)
A method for detection and monitoring a spreading stage of a biological cell for cancer diagnosis is disclosed. The method includes steps of removing biological cell lines from a material; culturing the cell lines via maintaining the removed biological cell lines in an appropriate medium at a controlled set of conditions; seeding the cultured biological cells lines on silicon nanowire electrode arrays of an electrical cell-substrate impedance sensor (ECIS); and measuring an electrical impedance of the seeded biological cell lines to detect and monitor a spreading state of the seeded biological cell lines for cancer diagnosis.
PROCESSES FOR SHAPING NANOMATERIALS
Processes for shaping one- and two-dimensional nanomaterials, and thereby inducing local strains therein preferably to control one or more of their material properties. The processes include providing a substrate comprising a three-dimensional surface feature thereon, locating a nanomaterial on the substrate and over the surface feature, and directing a laser beam toward the nanomaterial such that the nanomaterial experiences laser shock pressure sufficient to deform the nanomaterial to conform at least partially to the shape of the surface feature and adhere to the surface feature either directly or via an intermediate layer therebetween.
METHOD FOR THE SYNTHESIS OF CATALYST SELF-DOPED ZnS NANOSTRUCTURES
A method of synthesizing catalyst self-doped ZnS nanostructures including preparing a silicon substrate by vacuum depositing a metal catalyst nanostructure on an ultrathin silicon oxide layer, doping a zinc sulfide (ZnS) nanostructure with a catalyst of the metal catalyst nanostructure including at least one of gold (Au), manganese (Mn), and tin (Sn), and modulating ZnS intrinsic defects by the concentration of the catalyst and the size of the ZnS and metal catalyst nanostructures, in which the catalyst is dissolved in a nanowire of the ZnS nanostructure during growth, the concentration of the catalyst in the nanowire is dependent on the size of the catalyst, and the doping is tuned by growth conditions.
Nanowire Fabrication Method and Structure Thereof
A method of providing an out-of-plane semiconductor structure and a structure fabricated thereby is disclosed. The method comprises acts of: providing a substrate defining a major surface; providing a template layer having a predetermined template thickness on the major surface of the substrate; forming a recess in the template layer having a recess pattern and a recess depth smaller than the template thickness; and epitaxilally growing a semiconductor structure from the recess. A planar shape of the recess pattern formed in the template layer substantially dictates an extending direction of the semiconductor structure.
Process for growing at least one nanowire using a transition metal nitride layer obtained in two steps
The process for growing at least one semiconductor nanowire (3), said growth process comprising a step of forming, on a substrate (1), a nucleation layer (2) for the growth of the nanowire (3) and a step of growth of the nanowire (3). The step of formation of the nucleation layer (2) comprises the following steps: deposition onto the substrate (1) of a layer of a transition metal (4) chosen from Ti, V, Cr, Zr, Nb, Mo, Hf, Ta; nitridation of at least a part (2) of the transition metal layer so as to form a transition metal nitride layer having a surface intended for growing the nanowire (3).
ELECTROSTATIC CONTROL OF METAL WETTING LAYERS DURING DEPOSITION
There is disclosed a system for the electrostatic control of a metal wetting layer during deposition and a method of electrostatically controlling a metal wetting layer during deposition using a deposition system. In one example, control of the metal wetting layer is provided by changing or applying an electrostatic field acting on a deposited material or acting on a substrate on which a material is deposited. In another example, control is of the thickness of the metal wetting layer. In another example, control is of the presence or absence of the metal wetting layer. The metal wetting layer can be a liquid metal or liquid metal alloy, for example the metal wetting layer could be Boron, Aluminium, Indium, Gallium or Thallium. In another example, control is of the thickness, or presence, of a Gallium wetting layer during GaN film growth.
METHODS OF GROWING HETEROEPITAXIAL SINGLE CRYSTAL OR LARGE GRAINED SEMICONDUCTOR FILMS AND DEVICES THEREON
A method is provided for making smooth crystalline semiconductor thin-films and hole and electron transport films for solar cells and other electronic devices. Such semiconductor films have an average roughness of 3.4 nm thus allowing for effective deposition of additional semiconductor film layers such as perovskites for tandem solar cell structures which require extremely smooth surfaces for high quality device fabrication.