A region containing a high proportion of crystal components and a region containing a high proportion of amorphous components are formed separately in one oxide semiconductor film. The region containing a high proportion of crystal components is formed so as to serve as a channel formation region and the other region is formed so as to contain a high proportion of amorphous components. It is preferable that an oxide semiconductor film in which a region containing a high proportion of crystal components and a region containing a high proportion of amorphous components are mixed in a self-aligned manner be formed. To separately form the regions which differ in crystallinity in the oxide semiconductor film, first, an oxide semiconductor film containing a high proportion of crystal components is formed and then process for performing amorphization on part of the oxide semiconductor film is conducted.

This application discloses a method for manufacturing a thin film transistor, and a display panel. The method for manufacturing a thin film transistor includes steps of providing a substrate; forming an amorphous silicon thin film layer on the substrate; patterning the amorphous silicon thin film layer to form an amorphous silicon layer; forming a metal seed layer made of a nickel disilicide (NiSi.sub.2) material on the amorphous silicon layer; converting the amorphous silicon layer into a polysilicon layer under an induction effect of the metal seed layer and through an annealing treatment; and forming a source and drain layer.

In a method of manufacturing a semiconductor device, a single crystal oxide layer is formed over a substrate. After the single crystal oxide layer is formed, an isolation structure to define an active region is formed. A gate structure is formed over the single crystal oxide layer in the active region. A source/drain structure is formed.

A display device includes a substrate; a plurality of light-emitting elements on the substrate; and a plurality of pixel circuits on the substrate, being configured to control the plurality of light-emitting elements in one-to-one correspondence. Each of the plurality of pixel circuits includes a thin film transistor. The thin film transistor includes a channel. The plurality of pixel circuits are disposed at different positions in a scanning direction of a pulse laser beam for annealing the channels. At least channels for light-emitting elements of the same color out of the channels are disposed at the same phase of irradiation cycles of the pulse laser beam in the scanning direction.

A method of manufacturing a semiconductor nanowire semiconductor device is described. The method includes forming an amorphous channel material layer on a substrate, patterning the channel material layer to form semiconductor nanowires extending in a lateral direction on the substrate, and forming a cover layer covering an upper of the semiconductor nanowire. The cover layer and the nanowire are patterned to form a trench exposing a side section of an one end of the semiconductor nanowire and a catalyst material layer is formed in contact with a side surface of the semiconductor nanowire, and metal induced crystallization (MIC) by heat treatment is performed to crystallize the semiconductor nanowire in a length direction of the nanowire from the one end of the semiconductor nanowire in contact with the catalyst material.

The present disclosure discloses a thin film transistor, a method for manufacturing thereof, an array substrate and a display device. The method for manufacturing the thin film transistor includes: forming a nanowire active layer on one side of a base substrate; forming a conductive protective layer on one side of the nanowire active layer away from the base substrate; forming an insulating layer on one side of the protective layer away from the nanowire active layer; etching the insulating layer using a dry etching process to form a first via hole exposing a first region of the protective layer and a second via hole exposing a second region of the protective layer; and forming a source-drain layer on one side of the insulating layer away from the protective layer, wherein the source-drain layer includes a first electrode and a second electrode.

This application discloses a method for manufacturing a thin film transistor, and a display panel. The method for manufacturing a thin film transistor includes steps of providing a substrate; forming an amorphous silicon thin film layer on the substrate; patterning the amorphous silicon thin film layer to form an amorphous silicon layer; forming a metal seed layer made of a nickel disilicide (NiSi.sub.2) material on the amorphous silicon layer; converting the amorphous silicon layer into a polysilicon layer under an induction effect of the metal seed layer and through an annealing treatment; and forming a source and drain layer.

A method of producing a crystalline silicon film includes forming a first silicon film that is amorphous at formation, forming a doped film of silicon or germanium on the first silicon film, the doped film being amorphous at formation; and annealing the structure to crystallize the doped film and the first silicon film. A method of producing a crystalline silicon film includes forming a Si.sub.x1Ge.sub.1-x1 film on a substrate, forming a Si.sub.x2Ge.sub.1-x2 film on the Si.sub.x1Ge.sub.1-x1 film, the Si.sub.x1Ge.sub.1-x1 film being amorphous at formation and having a first thermal budget for crystallization, the Si.sub.x2Ge.sub.1-x2 film being amorphous at formation and having a second thermal budget for crystallization, the second thermal budget being lower than the first thermal budget, forming a silicon film on the Si.sub.x2Ge.sub.1-x2 film, the silicon film being amorphous at formation; and annealing to crystallize the Si.sub.x1Ge.sub.1-x1 film, the Si.sub.x2Ge.sub.1-x2 film, and the silicon film.

In one embodiment, a semiconductor storage device includes a stacked body in which a plurality of conducting layers are stacked through a plurality of insulating layers in a first direction, a semiconductor layer penetrating the stacked body, extending in the first direction and including metal atoms, and a memory film including a first insulator, a charge storage layer and a second insulator that are provided between the stacked body and the semiconductor layer. The semiconductor layer surrounds a third insulator penetrating the stacked body and extending in the first direction, and at least one crystal grain in the semiconductor layer has a shape surrounding the third insulator.

A method of manufacturing a semiconductor device includes steps of (i) forming a buffer layer of an insulating material on a substrate, (ii) forming a seed layer of catalyst material containing Ni on the buffer layer, (iii) forming, on the buffer layer, an amorphous intrinsic silicon layer for forming a channel, (iv) forming, on the amorphous intrinsic silicon layer, a non-intrinsic silicon layer for forming a source and/or drain, (v) forming a metal layer on the non-intrinsic silicon layer, and (vi) performing metal induced crystallization (MIC) process for crystallization of the amorphous intrinsic silicon layer and the amorphous non-intrinsic silicon layer, and activation of the amorphous non-intrinsic silicon layer to form a conductive area.