The present invention relates to a thin film transistor, a thin film transistor array panel, and a manufacturing method thereof. A thin film transistor according to an exemplary embodiments of the present invention includes: a gate electrode; a gate insulating layer positioned on or under the gate electrode; a channel region overlapping the gate electrode, the gate insulating layer interposed between the channel region and the gate electrode; and a source region and a drain region, facing each other with respect to the channel region, positioned in the same layer as the channel region, and connected to the channel region, wherein the channel region, the source region, and the drain region comprise an oxide semiconductor, and wherein a carrier concentration of the source region and the drain region is larger than a carrier concentration of the channel region.

The invention is equipped with a hydrophilic group generating gas supply portion, an installation stand, an irradiation device, and a flow generation portion. The hydrophilic group generating gas supply portion supplies a hydrophilic group generating gas into the treatment chamber. The installation stand is equipped with an installation plate and a support member. The installation plate has a ventilation portion, and the support member is provided protrusively from the installation plate, and supports the workpiece with an air gap left between the workpiece and the installation plate. The irradiation device irradiates the workpiece with an energy wave that induces activation of the hydrophilic group generating gas. The flow generation portion generates a flow of at least part of the activated hydrophilic group generating gas such that the hydrophilic group generating gas flows via the ventilation portion of the installation plate and flows around into the air gap.

The present invention provides a method for evaluating a semiconductor substrate subjected to a defect recovery heat treatment to recover a crystal defect in the semiconductor substrate having the crystal defect, flash lamp annealing is performed as the defect recovery heat treatment, and the method includes steps of measuring the crystal defect in the semiconductor substrate, which is being recovered, by controlling treatment conditions for the flash lamp annealing and analyzing a recovery mechanism of the crystal defect on the basis of a result of the measurement. Consequently, the method for evaluating a semiconductor substrate which enables evaluating a recovery process of the crystal defect is provided.

Heating treatment is performed on multiple dummy wafers to preheat in-chamber structures including a susceptor and the like prior to the treatment of a semiconductor wafer to be treated. The first few ones of the multiple dummy wafers are heated to a first heating temperature by light irradiation from halogen lamps, and are thereafter irradiated with a flash of light. The subsequent few ones of the multiple dummy wafers are heated to a second heating temperature lower than the first heating temperature by light irradiation from the halogen lamps, and are thereafter irradiated with a flash of light. This stabilizes the temperature of the in-chamber structures in a shorter time with fewer dummy wafers because the dummy wafers are heated to the high temperature and thereafter heated to the low temperature.

Pre-amorphization treatment is performed on a surface of a semiconductor wafer to make the surface amorphous. This can prevent channeling in which impurities enter more deeply than a predetermined value from the surface of the semiconductor wafer when ions are implanted in a subsequent ion implantation step. Next, heating treatment at a relatively low temperature is performed on the semiconductor wafer to recrystallize the amorphous layer formed in the surface, and flash light is then applied to the surface to activate the impurities. Even if flash heating at a relatively high temperature is performed on the surface of the semiconductor wafer that has the crystalline structure again, the implanted impurities can be prevented from being excessively deeply diffused. As a result, the impurities remain at a shallow depth from the surface of the semiconductor wafer, and thus the shallow junction can be achieved.

Before a start of a treatment of a semiconductor wafer to be treated first in a lot, a dummy wafer is transported into a chamber, and an atmosphere including a helium gas having high thermal conductivity is formed. When the dummy wafer is heated with light irradiation from halogen lamps, heat transfer from the dummy wafer the temperature of which has increased occurs at an upper chamber window and a lower chamber window, with the helium gas as a heating medium. At the time when the semiconductor wafer to be treated first is transported into the chamber, the upper chamber window and the lower chamber window are heated, which makes a temperature history of all the semiconductor wafers in the lot uniform. It is thus possible to omit dummy running.

An impurity of a second conductivity type is selectively doped in a surface of a semiconductor substrate of a first conductivity type to form doped regions. A portion of a surface of the doped regions is covered by a heat insulating film. At least a remaining portion of the surface of the doped regions is covered by an absorbing film and the doped regions are heated through the absorbing film, enabling an impurity region of the second conductivity type to be formed having two or more of the doped regions that have a same impurity concentration and differing carrier concentrations.

According to one aspect of the technique, there is provided a method of manufacturing a semiconductor device, including: (a) heating a heat insulating plate in a substrate retainer to a processing temperature by an electromagnetic wave, and measuring a temperature change of the heat insulating plate by a non-contact type thermometer until the processing temperature; (b) heating a test object provided with a chip that does not transmit a detection light of the thermometer and accommodated in the substrate retainer to the processing temperature, and measuring a temperature change of the chip by the thermometer until the processing temperature; (c) acquiring a correlation between the temperature change of the heat insulating plate and that of the chip based on measurement results; and (d) controlling a heater to heat the substrate based on the correlation and the temperature of the heat insulating plate measured by the thermometer.

A substrate processing device includes a substrate holding table, an ultraviolet irradiator, a tubular member, a first gas supplying unit, and a second gas supplying unit. The ultraviolet irradiator is disposed facing to the substrate through an active space and configured to irradiate the substrate with ultraviolet light. The tubular member includes an inner surface surrounding a side surface of the substrate holding table, and at least one opening at a position facing to the side surface on the inner surface. The first gas supplying unit supplies gas to a space between the side surface of the substrate holding table and the inner surface of the tubular member through the at least one opening. The second gas supplying unit supplies gas to an active space between the substrate and the ultraviolet irradiator.

A workpiece processing apparatus is provided. The workpiece processing apparatus can include a processing chamber and a workpiece disposed on a workpiece support within the processing chamber. The workpiece processing apparatus can include a gas delivery system and one or more exhaust ports for removing gas from the processing chamber such that a vacuum pressure can be maintained. The workpiece processing apparatus can include radiative heating sources configured to heat the workpiece. The workpiece processing apparatus can further include a plurality of reflectors. The workpiece processing apparatus can include a control system configured to control one or more positions of the reflectors.