A silicon carbide semiconductor device includes a first semiconductor layer of silicon carbide, a device structure provided on top of the first semiconductor layer, a second semiconductor layer of silicon carbide having a higher impurity concentration than the first semiconductor layer, provided under the first semiconductor layer, the second semiconductor layer implementing an ohmic-contact, and a metallic electrode film provided under the second semiconductor layer. A thickness of a carbon-containing region in which carbon-atoms are precipitated between the second semiconductor layer and the metallic electrode film is 10 nm or less.

Disclosed are a system for fabricating a semiconductor device and a method of fabricating a semiconductor device. The system may include a chamber, an extreme ultraviolet (EUV) source in the chamber and configured to generate an EUV beam, an optical system on the EUV source and configured to provide the EUV beam to a substrate, a substrate stage in the chamber and configured to receive the substrate, a reticle stage in the chamber and configured to hold a reticle that is configured to project the EUV beam onto the substrate, and a particle collector between the reticle and the optical system and configured to allow for a selective transmission of the EUV beam and to remove a particle.

A method of forming a resistive random access memory (RRAM) element, the method includes forming a Silicon layer on an oxide layer, depositing a thin film dopant layer on the Silicon layer, and controlling a concentration of the dopant in the thin film dopant layer.

Heating treatment is performed on a semiconductor wafer in an ammonia atmosphere formed in a chamber by light irradiation from halogen lamps and flash lamps. For the formation of the ammonia atmosphere in the chamber, pressure in the chamber is once reduced. The pressure in the chamber is also reduced after the heating treatment of the semiconductor wafer. Light irradiation from the halogen lamps is performed to heat the atmosphere in the chamber before the pressure in the chamber is reduced by exhausting the atmosphere from the chamber. The heating of the atmosphere in the chamber before the pressure reduction activates the thermal motion of gas molecules in the atmosphere and decreases a gas density. As a result, the gas molecules in the chamber are discharged rapidly during the pressure reduction, so that the pressure in the chamber is reduced to a predetermined pressure in a short time.

A substrate support device relating to technology disclosed in the description of the present application includes: a holding plate for opposing a substrate bowable by being heated by irradiation with flash light; and a plurality of substrate support pins provided on the holding plate and being for supporting the substrate, wherein the plurality of substrate support pins are arranged at locations where a volume of a space between the holding plate and the substrate in an unbowed state and a volume of a space between the holding plate and the substrate in a bowed state are equal to each other. Breakage of the substrate can be suppressed in a case where the substrate is bowed by flash light.

A first flash heating is performed in which a flash lamp emits a first flashing light to a semiconductor wafer having been heated to a first preheating temperature equal to or lower than 650 degrees C. by a light emission from a halogen lamp so that the temperature of a surface of the semiconductor wafer reaches 1000 degrees C. or higher. Then, a second flash heating is performed in which a second flashing light is emitted to the semiconductor wafer having been further heated by a light emission of the halogen lamp. Performing the first flash heating can suppress diffusion of impurity in the subsequent second flash heating. In the second flash heating, the impurity is activated and introduced crystal defects are recovered.

A wafer processing method includes a protective member laying step of placing a protective member on a face side of a wafer, a reverse side grinding step of grinding a reverse side of the wafer to thin the wafer, a cut groove forming step of positioning a cutting blade in alignment with projected dicing lines one at a time on the reverse side of the wafer, cutting the wafer with the cutting blade to form cut grooves in the wafer which terminate short of the face side thereof, and a cutting step of applying a laser beam to the wafer from the reverse side thereof along the cut grooves to completely sever the wafer along the projected dicing lines into individual device chips.

Methods and systems for implementing artificial intelligence enabled preparation end-pointing are disclosed. An example method at least includes obtaining an image of a surface of a sample, the sample including a plurality of features, analyzing the image to determine whether an end point has been reached, the end point based on a feature of interest out of the plurality of features observable in the image, and based on the end point not being reached, removing a layer of material from the surface of the sample.

A gallium nitride (GaN) substrate is injected with magnesium as a p-type dopant. The GaN substrate undergoes preheating through irradiation with light from halogen lamps in an atmosphere containing nitrogen and hydrogen, and further undergoes heating to a high temperature for a super-short time through irradiation with flashes of light from flash lamps. Heating the GaN substrate in the atmosphere containing nitrogen and hydrogen complements removed nitrogen, thus preventing nitrogen shortage. Such a heating process also enables heat treatment while supplying hydrogen to the GaN substrate. The heating process further enables crystal defects in the GaN substrate to be recovered. With these effects, the p-type dopant injected into the GaN substrate is activated with high efficiency.

A susceptor for semiconductor substrate processing is disclosed herein. In some embodiments, the susceptor may comprise an inner susceptor portion and an outer susceptor portion. The susceptor portions may self-align via complementary features, such as tabs on the outer susceptor and recesses on the inner susceptor portion. The inner susceptor portion may contain several contact pads with which to support a wafer during semiconductor processing. In some embodiments, the contact pads are hemispherical to reduce contact area with the wafer, thereby reducing risk of backside damage. The inner susceptor portion may contain a cavity with which to receive a thermocouple. In some embodiments, the diameter of the cavity is greater than the diameter of the thermocouple such that the thermocouple does not contact the walls of the cavity during processing, thereby providing highly accurate temperature measurements.