H01L21/2686

Heat treatment method by light irradiation
10755948 · 2020-08-25 · ·

A semiconductor wafer to be treated is placed on a susceptor made of quartz installed in a chamber, and is heated by light irradiation from halogen lamps. Before the first semiconductor wafer of a production lot is transported into the chamber, a preheating substrate is placed on the susceptor. Then, the preheating substrate is heated by light irradiation from the halogen lamps to preheat the susceptor. The susceptor is heated to a preheating temperature higher than a stable temperature when the semiconductor wafers of the production lot are continuously treated. This enables a structure in the chamber, other than the susceptor, to be preheated to a temperature during steady treatment of the semiconductor wafer in a short time, so that it is possible to eliminate dummy running for heating the structure in the chamber by applying heating treatment to a plurality of dummy wafers.

LIGHT IRRADIATION TYPE HEAT TREATMENT APPARATUS, AND HEAT TREATMENT METHOD
20200266084 · 2020-08-20 ·

A semiconductor wafer transport mode of a heat treatment apparatus is switchable between two modes of a high throughput mode and a low oxygen concentration mode as appropriate. In the low oxygen concentration mode, a first cooling chamber is used only as a path for transferring the semiconductor wafer, and a second cooling chamber is used only as a dedicated cooling unit for cooling the semiconductor wafer subjected to flash heating. On the other hand, in the high throughput mode, both of the first cooling chamber and the second cooling chamber are used as paths for transferring the semiconductor wafer, and as the cooling units, too.

LIGHT IRRADIATION TYPE HEAT TREATMENT METHOD AND HEAT TREATMENT APPARATUS
20200243402 · 2020-07-30 ·

A front surface of a semiconductor wafer is momentarily heated by irradiation with a flash of light from flash lamps. An upper radiation thermometer and a high-speed radiation thermometer unit measure a temperature of the front surface of the semiconductor wafer after the irradiation with the flash of light. The temperature data are sequentially accumulated, so that a temperature profile is acquired. An analyzer determines the highest measurement temperature of the semiconductor wafer subjected to the flash irradiation from the temperature profile to calculate a jump distance of the semiconductor wafer from a susceptor, based on the highest measurement temperature. If the calculated jump distance is greater than a predetermined threshold value, there is a high probability that the semiconductor wafer is significantly out of position, so that the transport of the semiconductor wafer to the outside is stopped.

Light pipe window structure for low pressure thermal processes

Embodiments disclosed herein relate to a light pipe structure for thermal processing of semiconductor substrates. In one embodiment, a light pipe window structure for use in a thermal process chamber includes a transparent plate, and a plurality of light pipe structures formed in a transparent material that is coupled to the transparent plate, each of the plurality of light pipe structures comprising a reflective surface and having a longitudinal axis disposed in a substantially perpendicular relation to a plane of the transparent plate.

CRYSTAL LAMINATE, SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME

Provided is a crystal laminate including: a crystal substrate formed from a monocrystal of group III nitride expressed by a compositional formula In.sub.xAl.sub.yGa.sub.1-x-yN (where 0x1, 0y1, 0x+y1), the crystal substrate containing at least any one of n-type impurity selected from the group consisting of Si, Ge, and O; and a crystal layer formed by a group III nitride crystal epitaxially grown on a main surface of the crystal substrate, at least any one of p-type impurity selected from the group consisting of C, Mg, Fe, Be, Zn, V, and Sb being ion-implanted in the crystal layer. The crystal laminate is configured in a manner such that an absorption coefficient of the crystal substrate for light with a wavelength of 2000 nm when the crystal substrate is irradiated with the light falls within a range of 1.8 cm.sup.1 or more and 4.6 cm.sup.1 or less under a temperature condition of normal temperature.

LIGHT IRRADIATION TYPE HEAT TREATMENT METHOD AND HEAT TREATMENT APPARATUS
20200211851 · 2020-07-02 ·

Multiple theoretical reflectances determined by simulation for a silicon substrate with thin films of multiple types and thicknesses formed thereon are registered in association with the types and the thicknesses in a database. A carrier storing semiconductor wafers in a lot is transported into a heat treatment apparatus. A reflectance of a semiconductor wafer is measured by applying light to a surface of the semiconductor wafer. The theoretical reflectance of the semiconductor wafer is calculated from the measured reflectance thereof. A theoretical reflectance closely resembling the theoretical reflectance of the semiconductor wafer is extracted from among the multiple theoretical reflectances registered in the database, whereby the type and thickness of the thin film formed on the surface of the semiconductor wafer are specified. Treatment conditions for the semiconductor wafer are determined based on the specified type and thickness of the thin film.

Heat treatment method for p-type semiconductor
10699906 · 2020-06-30 · ·

A germanium semiconductor layer doped with a dopant such as boron becomes a p-type semiconductor. The semiconductor layer is preheated at a preheating temperature ranging from 200 C. to 300 C., and then heated at a treatment temperature ranging from 500 C. to 900 C., by extremely short-time irradiation of flash light. While oxygen is unavoidably mixed in germanium and becomes a thermal donor at 300 C. to 500 C., the semiconductor layer stays in a temperature range of 300 C. to 500 C. for a negligibly short period of time due to an extremely short irradiation time of 0.1 milliseconds to 100 milliseconds by the flash light. Therefore, the thermal donor can be prevented from being generated in the germanium semiconductor layer.

Dicing A Wafer

A method for dicing a wafer includes scribing perforations in a wafer. The wafer has a monocrystalline structure and the perforations have a polycrystalline structures The method also includes adhering the wafer to a top surface of a dicing tape and applying a downward force on a periphery of the dicing tape. The downward force causes a bottom surface of the dicing tape to deform around a contour of a dome shaped chuck, breaking the perforations in the wafer.

Operating method of microwave heating device and microwave annealing process using the same

An operating method of microwave heating device is provided, in which a holder is disposed in a heating chamber, and a plurality of microwave transmitters are arranged outside the heating chamber. A plurality of half-wave-rectified power supplies are provided to connect the microwave transmitters, and the half-wave-rectified power supplies have capacitances respectively. A plurality of longitudinal waveguides and a plurality of transverse waveguides are installed in between the heating chamber and the microwave transmitters. The capacitance of each of the capacitors of the half-wave-rectified power supplies is adjusted, such that the microwave power pulse bandwidth of the microwave transmitters are extended to produce a plurality of overlapped couplings. The half-wave-rectified power supplies supply power to the microwave transmitters, so that the microwaves are guided into the heating chamber by the longitudinal waveguides and the transverse waveguides for exciting multiple microwave modes in the heating chamber.

SOI SUBSTRATE COMPATIBLE WITH THE RFSOI AND FDSOI TECHNOLOGIES

A semiconductor on insulator type substrate, comprising at least: a support layer; a semiconductor surface layer; a buried dielectric layer located between the support layer and the semiconductor surface layer; a trap rich layer located between the buried dielectric layer and the support layer, and comprising at least one polycrystalline semiconductor material and/or a phase change material;

in which the trap rich layer comprises at least one first region and at least one second region adjacent to each other in the plane of the trap rich layer, the material of the at least one first region being in an at least partially recrystallized state and having an electrical resistivity less than that of the material in the at least one second region.