A representative method includes forming a photo-sensitive material over a substrate, and forming a cap layer over the photo-sensitive material, and patterning the cap layer. Using the patterned cap layer, a first portion of the photo-sensitive material is selectively exposed to a pre-selected light wavelength to change at least one material property of the first portion of the photo-sensitive material, while preventing a second portion of the photo-sensitive material from being exposed to the pre-selected light wavelength. One, but not both of the following steps is then conducted: removing the first portion of the photo-sensitive material and forming in its place a conductive element at least partially surrounded by the second portion of the photo-sensitive material, or removing the second portion of the photo-sensitive material and forming from the first portion of the photo-sensitive material a conductive element electrically connecting two or more portions of a circuit.

Methods of fabricating semiconductor devices may include forming a hardmask layer including a photosensitive hardmask material on lower structures. The hardmask layer may include a lower portion and an upper portion thereon. An exposing and developing process may be performed on the hardmask layer to remove the upper portion of the hardmask layer and thereby form a hardmask structure with a substantially flat top surface.

Methods of selectively depositing high-K gate dielectric on a semiconductor structure are disclosed. The method includes providing a semiconductor structure disposed above a semiconductor substrate. The semiconductor structure is disposed beside an isolation sidewall. A sacrificial blocking layer is then selectively deposited on the isolation sidewall and not on the semiconductor structure. Thereafter, a high-K gate dielectric is deposited on the semiconductor structure, but not on the sacrificial blocking layer. Properties of the sacrificial blocking layer prevent deposition of oxide material on its surface. A thermal treatment is then performed to remove the sacrificial blocking layer, thereby forming a high-K gate dielectric only on the semiconductor structure.

Semiconductor devices and methods of forming the same are provided. An example method includes providing a workpiece including a first dummy gate stack and a second dummy gate stack in a first area of the workpiece, a third dummy gate stack and a fourth dummy gate stack in a second area of the workpiece, a hard mask layer over each of the first dummy gate stack, the second dummy gate stack, the third dummy gate stack, and the fourth dummy gate stack. The method further includes depositing a photoresist (PR) layer over the workpiece to form a first PR layer portion over the first area and a second PR layer portion over the second area; and selectively forming a first opening through the second PR layer portion over the third dummy gate stack and a second opening through the second PR layer portion over the fourth dummy gate stack.

According to one or more embodiments, a method for forming an etching mask includes forming a mask layer including a first organic material on a processing object, processing the mask layer to form a pattern including an opening, exposing the mask layer to a first oxidizing gas containing a first metal material such that the first metal material penetrates into the mask layer, and then exposing the mask layer to a first oxidizing gas including hydrogen peroxide or ozone to oxidize the first metal material.

Methods of and apparatuses for processing substrates having carbon-containing material using atomic layer deposition and selective deposition are provided. Methods involve exposing a carbon-containing material on a substrate to an oxidant and igniting a first plasma at a first bias power to modify a surface of the substrate and exposing the modified surface to an inert plasma at a second bias power to remove the modified surface. Methods also involve selectively depositing a second carbon-containing material onto the substrate. ALE and selective deposition may be performed without breaking vacuum.

A semiconductor device and method of manufacture are provided in which a passivation layer is patterned. In embodiments, by-products from the patterning process are removed using the same etching chamber and at the same time as the removal of a photoresist utilized in the patterning process. Such processes may be used during the manufacturing of FinFET devices.

The present application relates to a block copolymer and its use. The present application can provides a block copolymer that has an excellent self assembling property or phase separation property and therefore can be used in various applications and its use.

The inventive concept relates to a semiconductor device and a method for fabricating the same. The semiconductor device comprises active patterns protruding from a substrate, an interlayer dielectric layer disposed on the substrate and including grooves exposing the active patterns, and gate electrodes in the grooves. The grooves include a first groove having a first width and a second groove having a second width greater than the first width. The gate electrodes include a first gate electrode in the first groove, and a second gate electrode in the second groove. Each of the first and second gate electrodes includes a first work function conductive pattern on a bottom surface and sidewalls of corresponding one of the first and second grooves, and a second work function conductive pattern on the first work function conductive pattern.

An object of the present invention is to provide a polishing composition which can make the removal rate of a metal material and the removal rate of a resin material the same or close to each other in a chemical mechanical polishing process, which can accordingly avoid or suppress the occurrence of a step difference. The polishing composition contains: abrasive grains containing silica, with at least a part of hydrogen atoms constituting a silanol group located on a surface of the silica being substituted with a cation of at least one metal atom M selected from the group consisting of aluminum, chromium, titanium, zirconium, iron, zinc, tin, scandium, and gallium; and a dispersing medium. The pH of the polishing composition is more than 2 and 7 or less.