The present disclosure provides a method of fabricating a semiconductor device. The method includes providing a substrate, forming an interfacial layer on the substrate by treating the substrate with radicals, and forming a high-k dielectric layer on the interfacial layer. The radicals are selected from the group consisting of hydrous radicals, nitrogen/hydrogen radicals, and sulfur/hydrogen radicals.

Provided is a technique of forming a film on a substrate by performing a cycle a predetermined number of times. The cycle includes: forming a first layer by supplying a gas containing a first element to the substrate, wherein the first layer is a discontinuous layer, a continuous layer, or a layer in which at least one of the discontinuous layer or the continuous layer is overlapped; forming a second layer including the first layer and a discontinuous layer including a second element stacked on the first layer; and forming a third layer by supplying a gas containing a third element to the substrate to modify the second layer under a condition where a modifying reaction of the second layer by the gas containing the third element is not saturated.

The embodiments herein relate to methods and apparatus for depositing an encapsulation layer over memory stacks in MRAM and PCRAM applications. The encapsulation layer is a titanium dioxide (TiO.sub.2) layer deposited through an atomic layer deposition reaction. In some embodiments, the encapsulation layer may be deposited as a bilayer, with an electrically favorable layer formed atop a protective layer. In certain implementations, gaps between neighboring memory stacks may be filled with titanium oxide, for example through an atomic layer deposition reaction or a chemical vapor deposition reaction.

Method of deposition on a substrate of a dielectric film by introducing into a reaction chamber a vapor of a precursor selected from the group consisting of Zr(MeCp)(NMe.sub.2).sub.3, Zr(EtCp)(NMe.sub.2).sub.3, ZrCp(NMe.sub.2).sub.3, Zr(MeCp)(NEtMe).sub.3, Zr(EtCp)(NEtMe).sub.3, ZrCp(NEtMe).sub.3, Zr(MeCp)(NEt.sub.2).sub.3, Zr(EtCp)(NEt.sub.2).sub.3, ZrCp(NEt.sub.2).sub.3, Zr(iPr.sub.2Cp)(NMe.sub.2).sub.3, Zr(tBu.sub.2Cp)(NMe.sub.2).sub.3, Hf(MeCp)(NMe.sub.2).sub.3, Hf(EtCp)(NMe.sub.2).sub.3, HfCp(NMe.sub.2).sub.3, Hf(MeCp)(NEtMe).sub.3, Hf(EtCp)(NEtMe).sub.3, HfCp(NEtMe).sub.3, Hf(MeCp)(NEt.sub.2).sub.3, Hf(EtCp)(NEt.sub.2).sub.3, HfCp(NEt.sub.2).sub.3, Hf(iPr.sub.2Cp)(NMe.sub.2).sub.3, Hf(tBu.sub.2Cp)(NMe.sub.2).sub.3, and mixtures thereof; and depositing the dielectric film on the substrate.

Graded dielectric layers and methods of fabricating such dielectric layers provide dielectrics in a variety of electronic structures for use in a wide range of electronic devices and systems. In an embodiment, a dielectric layer is graded with respect to a doping profile across the dielectric layer. In an embodiment, a dielectric layer is graded with respect to a crystalline structure profile across the dielectric layer. In an embodiment, a dielectric layer is formed by atomic layer deposition incorporating sequencing techniques to generate a doped dielectric material.

An atomic layer deposition apparatus includes a chamber including a plurality of regions; and a heating device respectively providing specific temperature ranges for the plurality of regions. By flowing precursor gases at different flow rates in the different regions, thin films can be simultaneously formed in the different regions having different film thicknesses.

Electronic apparatus and methods of forming the electronic apparatus include a gallium lanthanide oxide film for use in a variety of electronic systems. The gallium lanthanide oxide film may be structured as one or more monolayers. The gallium lanthanide oxide film may be formed using atomic layer deposition.

Method of deposition on a substrate of a dielectric film by introducing into a reaction chamber a vapor of a precursor selected from the group consisting of Zr(MeCp)(NMe.sub.2).sub.3, Zr(EtCp)(NMe.sub.2).sub.3, ZrCp(NMe.sub.2).sub.3, Zr(MeCp)(NEtMe).sub.3, Zr(EtCp)(NEtMe).sub.3, ZrCp(NEtMe).sub.3, Zr(MeCp)(NEt.sub.2).sub.3, Zr(EtCp)(NEt.sub.2).sub.3, ZrCp(NEt.sub.2).sub.3, Zr(iPr.sub.2Cp)(NMe.sub.2).sub.3, Zr(tBu.sub.2Cp)(NMe.sub.2).sub.3, Hf(MeCp)(NMe.sub.2).sub.3, Hf(EtCp)(NMe.sub.2).sub.3, HfCp(NMe.sub.2).sub.3, Hf(MeCp)(NEtMe).sub.3, Hf(EtCp)(NEtMe).sub.3, HfCp(NEtMe).sub.3, Hf(MeCp)(NEt.sub.2).sub.3, Hf(EtCp)(NEt.sub.2).sub.3, HfCp(NEt.sub.2).sub.3, Hf(iPr.sub.2Cp)(NMe.sub.2).sub.3, Hf(tBu.sub.2Cp)(NMe.sub.2).sub.3, and mixtures thereof; and depositing the dielectric film on the substrate.

The embodiments herein relate to methods and apparatus for depositing an encapsulation layer over memory stacks in MRAM and PCRAM applications. The encapsulation layer is a titanium dioxide (TiO.sub.2) layer deposited through an atomic layer deposition reaction. In some embodiments, the encapsulation layer may be deposited as a bilayer, with an electrically favorable layer formed atop a protective layer. In certain implementations, gaps between neighboring memory stacks may be filled with titanium oxide, for example through an atomic layer deposition reaction or a chemical vapor deposition reaction.