H01L21/32051

METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE
20170287786 · 2017-10-05 · ·

A process of forming a first mask on a first region of a metal film formed on a surface of a substrate, a process of modulating a work function of a first exposed region of the metal film, using plasma of a first process gas, a process of removing the first mask, a process of forming a second mask on a second region of the metal film, and a process of modulating the work function of a second exposed region of the metal film, using plasma of a second process gas are executed.

Method of manufacturing silicon nanowire array

Provided is a method for manufacturing a silicon nanowire array comprising the steps of: positioning plastic particles separated apart from one another in a uniform random pattern on a silicon substrate; forming a catalyst layer between the plastic particles; removing the plastic particles; vertically etching portions of the silicon substrate that contact the catalyst layer; and removing the catalyst layer. The present invention provides a simple and cost-effective process, enables mass-production through large surface area processing, enables the manufacture of nanowire even at a site having limited resources, and enables the structures of nanowire to be individually controlled.

Method of, and apparatus for, forming hard mask
09779958 · 2017-10-03 · ·

A method of forming a hard mask includes depositing step for depositing a titanium nitride film on a surface of a to-be-processed object; adsorbing step for adsorbing oxygen-containing molecules onto a surface of the titanium nitride film; and heating step for heating the titanium nitride film to a predetermined temperature.

Method for making EMI shielding layer on a package

A method for making EMI shielding layer on a package is disclosed to include the steps of: a) disposing a UV curable adhesive which can be thermally released on a light-transmissive substrate; b) placing the package on the UV curable adhesive in such a way that the UV curable adhesive adheres to and cover a surface of the package having solder pads; c) irradiating UV light toward the light-transmissive substrate to cure the UV curable adhesive; d) forming an EMI shielding layer on the package; and e) thermally releasing the UV curable adhesive.

ELECTRONIC DEVICE MODULE AND METHOD OF MANUFACTURING THE SAME

An electronic device module, includes a substrate including a grounding electrode disposed on a surface of the substrate, an insulating portion encapsulating a portion of the surface of the substrate, an electronic component disposed on the surface of the substrate, wherein the electronic component is at least partially encapsulated by the insulating portion, and a sealing portion, having electrical conductivity, disposed on the substrate and the insulating portion. The sealing portion is electrically connected to the grounding electrode.

Butted contacts and methods of fabricating the same in semiconductor devices

A semiconductor structure includes a metal gate structure disposed over a semiconductor substrate, a gate spacer disposed on a sidewall of the metal gate structure, an source/drain contact disposed over the semiconductor substrate and separated from the metal gate structure by the gate spacer, and a contact feature coupling the metal gate structure to the source/drain contact. The contact feature may be configured to include a dielectric layer disposed on a metal layer, where the dielectric layer and the metal layer are defined by continuous sidewalls.

SHIELDED LEAD FRAME PACKAGES
20170236785 · 2017-08-17 ·

Devices and methods are disclosed, related to shielding and packaging of radio-frequency (RF) devices on substrates. In some embodiments, A radio-frequency (RF) module comprises a lead-frame package with a plurality of pins and at least one pin exposed from overmold compound. The module further includes a metal-based covering over a portion of the lead-frame package. Additionally, the metal-based covering can be in contact with the at least one pin.

Systems and methods of local focus error compensation for semiconductor processes

A system and method of compensating for local focus errors in a semiconductor process. The method includes providing a reticle and applying, at a first portion of the reticle, a step height based on an estimated local focus error for a first portion of a wafer corresponding to the first portion of the reticle. A multilayer coating is formed over the reticle and an absorber layer is formed over the multilayer coating. A photoresist is formed over the absorber layer. The photoresist is patterned, an etch is performed of the absorber layer and residual photoresist is removed.

Electrode having excellent light transmittance, method for manufacturing same, and electronic element including same

An electronic device with an electrode having a superior light transmittance and including a substrate, an amine group-containing compound layer formed on the substrate, and a metal layer formed on the amine group-containing compound layer is provided. In accordance with the present invention, the electrode is easily manufactured when a solution process is used, has performances of a light transmittance, a sheet resistance, and flexibility higher than those of a typical ITO transparent electrode, and a manufacturing cost of the electrode may be reduced.

Methods of manufacturing semiconductor devices and apparatuses for manufacturing the same

A method of manufacturing a semiconductor device may include forming a stack structure by alternately stacking sacrificial layers and interlayer insulating layers on a substrate, forming channel structures extending through the stack structure, forming openings extending through the stack structure, forming lateral openings by removing the sacrificial layers exposed by the openings, and forming gate electrodes in the lateral openings. Forming the gate electrodes may include supplying a source gas containing tungsten (W) wherein the source gas is heated to a first temperature and is supplied in a deposition apparatus at the first temperature, supplying a reactant gas containing hydrogen (H) subsequently to supplying the source gas, wherein the reactant gas is heated to a second temperature and is supplied in the deposition apparatus at the second temperature, and supplying a purge gas subsequently to supplying the reactant gas.