A method of performing a chemical mechanical planarization (CMP) process includes holding a wafer by a retainer ring attached to a carrier, pressing the wafer against a first surface of a polishing pad, the polishing pad rotating at a first speed, dispensing a slurry on the first surface of the polishing pad, and generating vibrations at the polishing pad.

A method includes forming a gate structure and an interlayer dielectric (ILD) layer over a substrate; selectively forming an inhibitor over the gate structure; performing an atomic layer deposition (ALD) process to form a dielectric layer over the ILD layer, wherein in the ALD process the dielectric layer has greater growing rate on the ILD than on the inhibitor; and performing an atomic layer etching (ALE) process to etch the dielectric layer until a top surface of the inhibitor is exposed, in which a portion of the dielectric layer remains on the ILD layer after the ALE process is complete.

A method includes forming a gate structure and an interlayer dielectric (ILD) layer over a substrate; selectively forming an inhibitor over the gate structure; performing an atomic layer deposition (ALD) process to form a dielectric layer over the ILD layer, wherein in the ALD process the dielectric layer has greater growing rate on the ILD than on the inhibitor; and performing an atomic layer etching (ALE) process to etch the dielectric layer until a top surface of the inhibitor is exposed, in which a portion of the dielectric layer remains on the ILD layer after the ALE process is complete.

Embodiments of the present invention provide a method for removing a barrier layer of a metal interconnection on a wafer, which remove a single-layer metal ruthenium barrier layer. A method comprises: oxidizing step, is to oxidize the single-layer metal ruthenium barrier layer into a ruthenium oxide layer by electrochemical anodic oxidation process; oxide layer etching step, is to etch the ruthenium oxide layer with etching liquid to remove the ruthenium oxide layer. The present invention also provides a method for removing a barrier layer of a metal interconnection on a wafer, using in a structure of a process node of 10 nm and below, wherein the structure comprises a substrate, a dielectric layer, a barrier layer and a metal layer, the dielectric layer is deposited on the substrate and recessed areas are formed on the dielectric layer, the barrier layer is deposited on the dielectric layer, the metal layer is deposited on the barrier layer, wherein the metal layer is a copper layer, the barrier layer is a single-layer metal ruthenium layer, and the method comprises: thinning step, is to thin the metal layer; removing step, is to remove the metal layer; oxidizing step, is to oxidize the barrier layer, and the oxidizing step uses an electrochemical anodic oxidation process; oxide layer etching step, is to etch the oxidized barrier layer.

An element package includes a semiconductor element, a redistribution layer, a sealing resin body, and an insulating portion. The semiconductor element includes a semiconductor substrate having an element region and a scribe region, a main electrode and a pad disposed on a surface of the semiconductor substrate, and a protective film disposed above the element region on the surface of the semiconductor substrate. The sealing resin body seals the semiconductor element while exposing the main electrode and the pad. The insulating portion is disposed above the scribe region on the surface of the semiconductor element with a height not to exceed an outer peripheral edge portion of an upper surface of the protective film on the element region. The redistribution layer extends over the protective film and the insulating portion above the scribe region.

In one example, an electroplating system comprises a first bath reservoir, a second bath reservoir, a clamp, a first anode in the first bath reservoir, a second anode in the second bath reservoir, and a direct current power supply. The first bath reservoir contains a first electrolyte solution that includes an alkaline copper-complexed solution. The second bath reservoir contains a second electrolyte solution that includes an acidic copper plating solution. The direct current power supply generates a first direct current between the clamp and the first anode to electroplate a first copper layer on the cobalt layer of the wafer submerged in the first electrolyte solution. The direct current power supply then generates a second direct current between the clamp and the second anode to electroplate a second copper layer on the first copper layer of the wafer submerged in the second electrolyte solution.

In an embodiment, a method includes: receiving, within a processing chamber, a wafer with a photoresist mask above a metal layer, wherein the processing chamber is connected to a gas source; applying an etchant configured to etch the metal layer in accordance with the photoresist mask within the processing chamber; and applying gas from the gas source to perform plasma ashing in the processing chamber.

A substrate cleaning system includes a cleaner module to clean a substrate after polishing of the substrate, a drier module to dry the substrate after cleaning by the cleaner module, a substrate support movable along a first axis from a first position in the drier module to a second position outside the drier module, and an in-line metrology station including a line-scan camera positioned to scan the substrate as the substrate is held by the substrate support and the substrate support is between the first position to the second position. The first axis is substantially parallel to a face of the substrate as held in by the substrate support.

A method of processing a substrate that includes: loading the substrate in a processing system, the substrate including a metal having a metal surface and a first dielectric material having a dielectric material surface, the metal surface and the dielectric material surface being at the same level; etching the metal to form a recessed metal surface below the dielectric material surface; selectively forming a self-assembled monolayer (SAM) on the recessed metal surface using a spin-on process; and depositing a dielectric film including a second dielectric material on the dielectric material surface.

Methods and apparatus for processing a substrate are provided herein. For example, a method of processing a substrate comprises a) removing oxide from a metal layer disposed in a dielectric layer on the substrate disposed in a processing chamber, b) selectively depositing a self-assembled monolayer (SAM) on the metal layer using atomic layer deposition, c) depositing a precursor while supplying water to form one of an aluminum oxide (AlO) layer on the dielectric layer or a low-k dielectric layer on the dielectric layer, d) supplying at least one of hydrogen (H.sub.2) or ammonia (NH.sub.3) to remove the self-assembled monolayer (SAM), and e) depositing one of a silicon oxycarbonitride (SiOCN) layer or a silicon nitride (SiN) layer atop the metal layer and the one of the aluminum oxide (AlO) layer on the dielectric layer or the low-k dielectric layer on the dielectric layer.