Patent classifications
H
ELECTRICITY
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H01
ELECTRIC ELEMENTS
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H01L
SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
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21/00
Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
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H01L21/02
Manufacture or treatment of semiconductor devices or of parts thereof
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H01L21/04
the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
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H01L21/18
the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
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H01L21/30
Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
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H01L21/322
to modify their internal properties, e.g. to produce internal imperfections
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H01L21/3221
of silicon bodies, e.g. for gettering
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H01L21/3223
using cavities formed by hydrogen or noble gas ion implantation
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H01L21/3223

Trench-gate sic mosfet device and manufacturing method therefor
12414350 · 2025-09-09 · ·

The present invention relates to a trench-gate SiC MOSFET device and a manufacturing method therefor. The trench-gate SiC MOSFET device of the present invention comprises: a gate oxide film covering a gate trench formed in a SiC substrate (e.g., an n-type 4H-SiC substrate); a doped well (e.g., BPW) formed in a bottom region of the gate trench; a gate electrode formed in the gate trench covered by the gate oxide film; an interlayer insulating film formed on the gate electrode; a source electrode covering the top surface of a doping layer for a source area formed on the entire surface of an epitaxial layer of the substrate and the top surface of the interlayer insulating film; and a drain electrode formed on the rear surface of the substrate.