Patent classifications
H01L21/3226
MULTI-LAYERED POLYSILICON AND OXYGEN-DOPED POLYSILICON DESIGN FOR RF SOI TRAP-RICH POLY LAYER
In some embodiments, the present disclosure relates to a high-resistivity silicon-on-insulator (SOI) substrate, including a first polysilicon layer arranged over a semiconductor substrate. A second polysilicon layer is arranged over the first polysilicon layer, and a third polysilicon layer is arranged over the second polysilicon layer. An active semiconductor layer over an insulator layer may be arranged over the third polysilicon layer. The second polysilicon layer has an elevated concentration of oxygen compared to the first and third polysilicon layers.
METHOD OF PREPARING AN ISOLATION REGION IN A HIGH RESISTIVITY SILICON-ON-INSULATOR SUBSTRATE
A multilayer composite structure and a method of preparing a multilayer composite structure are provided. The multilayer composite structure comprises a semiconductor handle substrate having a minimum bulk region resistivity of at least about 500 ohm-cm and an isolation region that impedes the transfer of charge carriers along the surface of the handle substrate and reduces parasitic coupling between RF devices.
MULTILAYER STACK OF SEMICONDUCTOR-ON-INSULATOR TYPE, ASSOCIATED PRODUCTION PROCESS, AND RADIO FREQUENCY MODULE COMPRISING IT
A production method for a semi-conductor-on-insulator type multilayer stack includes ion implantation in a buried portion of a superficial layer of a support substrate, so as to form a layer enriched with at least one gas, intended to form a porous semi-conductive material layer, the thermal oxidation of a superficial portion of the superficial layer to form an oxide layer extending from the surface of the support substrate, the oxidation and the implantation of ions being arranged such that the oxide layer and the enriched layer are juxtaposed, and the assembly of the support substrate and of a donor substrate.
METHOD OF FORMING A POROUS PORTION IN A SUBSTRATE
The invention relates to a method for forming a porous portion in a substrate, an implantation of ions in at least one region of a layer, for example based on a semiconductor material, so as to form a portion enriched with at least one gas in the implanted region, and then a laser annealing of the nanosecond type so as to form a porous portion. The use of the ion implantation makes it possible to dissociate the deposition of the layer based on semiconductor material from the incorporation of gas. A great variety of porous structures can be obtained by the method. These porous structures can be adapted for numerous applications according to the properties sought.
Method for producing bonded SOI wafer
A method for producing a bonded SOI wafer by bonding a bond wafer and a base wafer, each being formed of a silicon single crystal, together with a silicon oxide film placed therebetween, the method including: preparing, as the base wafer, a silicon single crystal wafer whose resistivity is 100 .Math.cm or more and initial interstitial oxygen concentration is 10 ppma or less; forming, on the front surface of the base wafer, a silicon oxide film by performing, on the base wafer, heat treatment in an oxidizing atmosphere at a temperature of 700 C. or higher and 1000 C. or lower for 5 hours or more; bonding the base wafer and the bond wafer together with the silicon oxide film placed therebetween; and thinning the bonded bond wafer to form an SOI layer.
METHOD OF PREPARING AN ISOLATION REGION IN A HIGH RESISTIVITY SILICON-ON-INSULATOR SUBSTRATE
A multilayer composite structure and a method of preparing a multilayer composite structure are provided. The multilayer composite structure comprises a semiconductor handle substrate having a minimum bulk region resistivity of at least about 500 ohm-cm and an isolation region that impedes the transfer of charge carriers along the surface of the handle substrate and reduces parasitic coupling between RF devices.
Method of preparing an isolation region in a high resistivity silicon-on-insulator substrate
A multilayer composite structure and a method of preparing a multilayer composite structure are provided. The multilayer composite structure comprises a semiconductor handle substrate having a minimum bulk region resistivity of at least about 500 ohm-cm and an isolation region that impedes the transfer of charge carriers along the surface of the handle substrate and reduces parasitic coupling between RF devices.
Insulating layer structure for semiconductor product, and preparation method of insulating layer structure
An insulating layer structure for a semiconductor product. The insulating layer structure includes a device substrate, a supporting substrate and a thin film layer. The device substrate and the supporting substrate are silicon wafers. The thin film layer(s) is/are arranged on the device substrate or/and the supporting substrate. The device substrate and the supporting substrate are bonded together through the thin film layer arranged on at least one of the device substrate and the supporting substrate to form an integral multilayer SOI structure. The insulating layer structure formed by the present invention solves problems of serious spontaneous heating of an existing SOI device, severe warpage of an existing SOI structure caused by high-temperature annealing, a poor radio frequency characteristic and the like, and has a predictable relatively higher economic and social value.
SEMICONDUCTOR WAFER COMPOSED OF MONOCRYSTALLINE SILICON
A semiconductor wafer of single-crystal silicon includes: a polished front side and a back side; a denuded zone, which extends from the polished front side toward the back side to a depth of not less than 45 m; and a region adjacent to the denuded zone, the region having bulk micro defect (BMD) seeds, which are capable of being developed into BMDs. A density of the BMDs at a distance of 120 m from the front side is not less than 310.sup.9 cm.sup.3.
HEALING METHOD BEFORE TRANSFER OF A SEMICONDUCTING LAYER
A method of healing defects generated in a semiconducting layer by implantation of species made in a substrate to form therein an embrittlement plane separating a solid part of the substrate from the semiconducting layer, the semiconducting layer having a front face through which the implanted species pass. The method comprises local annealing of the substrate causing heating of the semiconducting layer, the intensity of which decreases from the front face towards the embrittlement plane. The local annealing may comprise a laser irradiation of a front surface of the substrate.