Patent classifications
H01L21/467
ETCHING GAS COMPOSITIONS, METHODS OF FORMING MICROPATTERNS, AND METHODS OF MANUFACTURING SEMICONDUCTOR DEVICE
An etching gas composition includes a first organofluorine compound having 3 to 6 carbon atoms, and an organosulfur compound having 1 to 4 sulfur atoms. The organosulfur compound may include a carbon-fluorine (C—F) bond, a carbon-sulfur (C—S) bond, at least one carbon-carbon double (—C═C—) bond. When the etching gas composition is used, excellent etch selectivity may be obtained, and the linearity and verticality of a pattern may be greatly increased by improving line edge roughness (LER) and line width roughness (LWR) due to an improvement in the roughness of an etched surface.
ETCHING GAS COMPOSITIONS, METHODS OF FORMING MICROPATTERNS, AND METHODS OF MANUFACTURING SEMICONDUCTOR DEVICE
An etching gas composition includes a first organofluorine compound having 3 to 6 carbon atoms, and an organosulfur compound having 1 to 4 sulfur atoms. The organosulfur compound may include a carbon-fluorine (C—F) bond, a carbon-sulfur (C—S) bond, at least one carbon-carbon double (—C═C—) bond. When the etching gas composition is used, excellent etch selectivity may be obtained, and the linearity and verticality of a pattern may be greatly increased by improving line edge roughness (LER) and line width roughness (LWR) due to an improvement in the roughness of an etched surface.
TIN OXIDE FILMS IN SEMICONDUCTOR DEVICE MANUFACTURING
A method of processing a substrate includes: providing a substrate having one or more mandrels comprising a mandrel material, wherein a layer of a spacer material coats horizontal surfaces and sidewalls of the one or more mandrels; and etching and completely removing the layer of the spacer material from the horizontal surfaces of the one or more mandrels and thereby exposing the mandrel material, without completely removing the spacer material residing at the sidewalls of the one or more mandrels. The etching includes exposing the substrate to a plasma formed using a mixture comprising a first gas and a polymer-forming gas, and wherein the etching comprises forming a polymer on the substrate. Polymer-forming gas may include carbon (C) and hydrogen (H).
TIN OXIDE FILMS IN SEMICONDUCTOR DEVICE MANUFACTURING
A method of processing a substrate includes: providing a substrate having one or more mandrels comprising a mandrel material, wherein a layer of a spacer material coats horizontal surfaces and sidewalls of the one or more mandrels; and etching and completely removing the layer of the spacer material from the horizontal surfaces of the one or more mandrels and thereby exposing the mandrel material, without completely removing the spacer material residing at the sidewalls of the one or more mandrels. The etching includes exposing the substrate to a plasma formed using a mixture comprising a first gas and a polymer-forming gas, and wherein the etching comprises forming a polymer on the substrate. Polymer-forming gas may include carbon (C) and hydrogen (H).
Planarization of semiconductor devices
In certain embodiments, a method for processing a substrate includes applying a surface treatment to selected surfaces of the substrate. The substrate has a non-planar topography including structures defining recesses. The method further includes depositing a fill material on the substrate by spin-on deposition. The surface treatment directs the fill material to the recesses and away from the selected surfaces to fill the recesses with the fill material without adhering to the selected surfaces. The method further includes removing the surface treatment from the selected surfaces of the substrate and depositing a planarizing film on the substrate by spin-on deposition. The planarizing film is deposited on the selected surfaces and top surfaces of the fill material.
Planarization of semiconductor devices
In certain embodiments, a method for processing a substrate includes applying a surface treatment to selected surfaces of the substrate. The substrate has a non-planar topography including structures defining recesses. The method further includes depositing a fill material on the substrate by spin-on deposition. The surface treatment directs the fill material to the recesses and away from the selected surfaces to fill the recesses with the fill material without adhering to the selected surfaces. The method further includes removing the surface treatment from the selected surfaces of the substrate and depositing a planarizing film on the substrate by spin-on deposition. The planarizing film is deposited on the selected surfaces and top surfaces of the fill material.
Semiconductor device, manufacturing method of semiconductor device, and electronic device
Provided is a semiconductor device which can suppress an increase in oxygen vacancies in an oxide semiconductor layer and a manufacturing method of the semiconductor device. The semiconductor device includes a first oxide semiconductor layer over the first insulating layer; a second oxide semiconductor layer over the first oxide semiconductor layer; a third oxide semiconductor layer over the second oxide semiconductor layer; a source electrode layer and a drain electrode layer each over the third oxide semiconductor layer; a fourth semiconductor layer over the source and drain electrode layers, and the third oxide semiconductor layer; a gate insulating layer over the fourth oxide semiconductor layer; a gate electrode layer over the gate electrode layer and overlapping with the source and drain electrode layers, and the fourth oxide semiconductor layer; and a second insulating layer over the first insulating layer, and the source, gate, and drain electrode layers.
Semiconductor device, manufacturing method of semiconductor device, and electronic device
Provided is a semiconductor device which can suppress an increase in oxygen vacancies in an oxide semiconductor layer and a manufacturing method of the semiconductor device. The semiconductor device includes a first oxide semiconductor layer over the first insulating layer; a second oxide semiconductor layer over the first oxide semiconductor layer; a third oxide semiconductor layer over the second oxide semiconductor layer; a source electrode layer and a drain electrode layer each over the third oxide semiconductor layer; a fourth semiconductor layer over the source and drain electrode layers, and the third oxide semiconductor layer; a gate insulating layer over the fourth oxide semiconductor layer; a gate electrode layer over the gate electrode layer and overlapping with the source and drain electrode layers, and the fourth oxide semiconductor layer; and a second insulating layer over the first insulating layer, and the source, gate, and drain electrode layers.
HIGH ELECTRON MOBILITY TRANSISTOR (HEMT) AND PROCESS OF FORMING THE SAME
A High Electron Mobility Transistor (HEMT) and a process of forming the same are disclosed. The HEMT includes a substrate, a channel layer, a barrier layer, and heavily doped regions made of metal oxide. The channel layer and the barrier layer provide recesses and a mesa therebetween. The heavily doped regions are formed by partially removing in a portion thereof on the mesa and have slant surfaces facing the gate electrode. The slant surfaces make angle of 135° to 160° against the top horizontal level of the mesa.
HIGH ELECTRON MOBILITY TRANSISTOR (HEMT) AND PROCESS OF FORMING THE SAME
A High Electron Mobility Transistor (HEMT) and a process of forming the same are disclosed. The HEMT includes a substrate, a channel layer, a barrier layer, and heavily doped regions made of metal oxide. The channel layer and the barrier layer provide recesses and a mesa therebetween. The heavily doped regions are formed by partially removing in a portion thereof on the mesa and have slant surfaces facing the gate electrode. The slant surfaces make angle of 135° to 160° against the top horizontal level of the mesa.