H01L21/47

METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE

A method for manufacturing a semiconductor device includes: providing a wafer-bonding stack structure having a sidewall layer and an exposed first component layer; forming a photoresist layer on the first component layer; performing an edge trimming process to at least remove the sidewall layer; and removing the photoresist layer. In this way, contaminant particles generated from the blade during the edge trimming process may fall on the photoresist layer but not fall on the first component layer, so as to protect the first component layer from being contaminated.

Method of manufacturing a semiconductor device

A method of manufacturing a semiconductor device may include: forming an opening in a dielectric layer, the opening exposing a non-conductive layer disposed over a semiconductor substrate; forming a self-assembled monolayer (SAM) within the opening and over the non-conductive layer; forming a catalytic layer within the opening and over the SAM; filling the opening having the SAM and the catalytic layer with a conductive material to form a plug; and forming a barrier layer on sidewalls of the plug.

Thin film transistor and method of manufacturing the same
09831350 · 2017-11-28 · ·

Provided is a thin film transistor (TFT) that includes a first electrode on a substrate separated from a second electrode, an oxide semiconductor pattern on the second electrode including a channel region, a third electrode on the oxide semiconductor pattern, a first insulating layer on the substrate including the third electrode including first contact holes exposing a part of the first electrode, a part of the second electrode, and a part of the third electrode, a gate electrode on the first insulating layer and corresponding to a part of the oxide semiconductor pattern, a second insulating layer on the substrate including the gate electrode including a second contact hole corresponding to the first contact hole that exposes a part of the second electrode, and a pixel electrode on the second insulating layer electrically connected to the second electrode through the first contact hole and the second contact hole.

FILM DEPOSITION FOR PATTERNING PROCESS
20230178379 · 2023-06-08 ·

Embodiments utilize a photoetching process in forming a patterned target layer. After forming a patterned mandrel layer and spacer layer over the patterned mandrel layer, a bottom layer of a photomask is deposited using a chemical vapor deposition process to form an amorphous carbon film. An upper layer of the photomask is used to pattern the bottom layer to form openings for a reverse material. The reverse material is deposited in the openings of the bottom layer, the bottom layer providing both a mask and template function for the reverse material.

FILM DEPOSITION FOR PATTERNING PROCESS
20230178379 · 2023-06-08 ·

Embodiments utilize a photoetching process in forming a patterned target layer. After forming a patterned mandrel layer and spacer layer over the patterned mandrel layer, a bottom layer of a photomask is deposited using a chemical vapor deposition process to form an amorphous carbon film. An upper layer of the photomask is used to pattern the bottom layer to form openings for a reverse material. The reverse material is deposited in the openings of the bottom layer, the bottom layer providing both a mask and template function for the reverse material.

Filler material for organic electroluminescent element and method of sealing organic electroluminescent element

A filler material for an organic electroluminescent element, formed of a resin composition being liquid at 25° C., and containing a hydrocarbon polymer having a number average molecular weight of 300 or more and less than 32,000 and an organometallic compound represented by M-L.sub.n (wherein, M represents a metal atom; L represents an organic group having 9 or more carbon atoms and 1 or more oxygen atoms, and all of L represent the same organic group; and n represents the valence of a metal atom M), wherein a contact angle to silicon nitride is 10 to 40 degrees, and an amount of outgassing other than moisture upon heating at 85° C. for 1 hour is 500 ppm or less in terms of a toluene equivalent, and a method of sealing an organic electroluminescent element using the same.

PEELING METHOD AND MANUFACTURING METHOD OF FLEXIBLE DEVICE

A peeling method at low cost with high mass productivity is provided. An oxide layer is formed over a formation substrate, a first layer is formed over the oxide layer using a photosensitive material, an opening is formed in a portion of the first layer that overlaps with the oxide layer by a photolithography method and the first layer is heated to form a resin layer having an opening, a transistor including an oxide semiconductor in a channel formation region is formed over the resin layer, a conductive layer is formed to overlap with the opening of the resin layer and the oxide layer, the oxide layer is irradiated with light using a laser, and the transistor and the formation substrate are separated from each other.

Semiconductor device comprising oxide semiconductor layer including regions with different concentrations of resistance-reducing elements

To increase the on-state current of a transistor whose channel is formed in an oxide semiconductor layer. To provide a transistor where a resistance-reducing element is introduced into a region of an oxide semiconductor layer which overlaps with part of a source or drain or part of a gate. For example, the thickness of a region of a conductive layer serving as a source or drain or a gate (at least part of a region overlapping with an oxide semiconductor layer) is made smaller than that of the other region of the conductive layer. A resistance-reducing element is introduced into the oxide semiconductor layer through the conductive layer thinned partly, thereby obtaining the oxide semiconductor layer where the resistance-reducing element is introduced into the region overlapping with part of the source or drain or part of the gate. Thus, the on-state current of the transistor can be increased.

Thin film transistor and method of manufacturing the same, array substrate and display device

The present invention discloses a thin film transistor, comprising a gate electrode (2), a gate insulating layer (3), and active layer (4), and etching barrier layer (7), a source electrode and a drain electrode, wherein the source electrode comprises a first source electrode (5) and a second source electrode (8) electrically connected therewith, the drain electrode comprises a first drain electrode (6) and a second drain electrode (9) electrically connected therewith, the first source electrode and first drain electrode are formed on the active layer, the etching barrier layer at least covers a portion of the active layer between the first source electrode and the first drain electrode, and respectively covers portions of the first source electrode (5) and the first drain electrode (6) adjacent to each other, and the second source electrode and the second drain electrode are formed on the etching barrier layer. The present invention further discloses a method of manufacturing a thin film transistor, an array substrate and a display device both comprising the thin film transistor. The thin film transistor formed according to the present invention has a short channel length, which increases an on-state current of the thin film transistor while improving ohmic contact between the source and drain electrodes and the active layer, thereby increasing the stability of the thin film transistor.

TFT backplate structure comprising transistors having gate isolation layers of different thicknesses and manufacture method thereof

The present invention provides a TFT backplate structure and a manufacture method thereof. The TFT backplate structure comprises a switch TFT (T1) and a drive TFT (T2). The switch TFT (T1) is constructed by a first source/a first drain (61), a first gate (21), and a first etching stopper layer (51), a first oxide semiconductor layer (41), a first gate isolation layer (31) sandwiched in between. The drive TFT (T2) is constructed by a second source/a second drain (62), a second gate (22), and a second oxide semiconductor layer (42), a first etching stopper layer (51), a second gate isolation layer (32) sandwiched in between. The electrical properties of the switch TFT (T1) and the drive TFT (T2) are different. The switch TFT has smaller subthreshold swing to achieve fast charge and discharge, and the drive TFT has relatively larger subthreshold swing for controlling the current and the grey scale more precisely.