H01L21/76259

BACKSIDE INTERCONNECT FOR INTEGRATED CIRCUIT PACKAGE INTERPOSER

Methods are provided for forming an integrated circuit (IC) package interposer configured for back-side attachment. A porous silicon double layer is formed on a bulk silicon wafer, e.g., using a controlled anodization, the porous silicon double layer including two porous silicon layers having different porosities. An interposer is formed over the porous silicon double layer, the interposer including back-side contacts, front-side contacts, and conductive structures (e.g., vias and metal interconnect) extending through the interposer to connect selected back-side contacts with selected front-side contacts. The structure is then split at the interface between the first and second porous silicon layers of the silicon double layer, and the interposer including the second porous silicon layers is inverted and etched to remove the second silicon layer and expose the back-side contacts, such that the exposed back-side contacts can be used for back-side attachment of the interposer to a package substrate or other structure.

SUBSTRATE PROCESSING SYSTEM AND SUBSTRATE PROCESSING METHOD
20210296119 · 2021-09-23 ·

A substrate processing system configured to process a substrate includes a first modifying apparatus configured to form, in a combined substrate in which a front surface of a first substrate and a front surface of a second substrate are bonded to each other, an internal modification layer elongated within the first substrate in a plane direction from a center of the first substrate toward at least an edge portion of the first substrate as a removing target; a second modifying apparatus configured to form, within the first substrate, an edge modification layer elongated in a thickness direction of the first substrate along a boundary between the edge portion and a central portion of the first substrate; and a separating apparatus configured to separate a portion of the first substrate at a rear surface side, starting from the internal modification layer.

Method for Producing a Layer of Solid Material
20210225694 · 2021-07-22 ·

A method for producing a layer of solid material includes: providing a solid body having opposing first and second surfaces, the second surface being part of the layer of solid material; generating defects by means of multiphoton excitation caused by at least one laser beam penetrating into the solid body via the second surface and acting in an inner structure of the solid body to generate a detachment plane, the detachment plane including regions with different concentrations of defects; providing a polymer layer on the solid body; and generating mechanical stress in the solid body such that a crack propagates in the solid body along the detachment plane and the layer of solid material separates from the solid body along the crack.

METHODS TO PROCESS A 3D SEMICONDUCTOR DEVICE AND STRUCTURE
20210287941 · 2021-09-16 · ·

A method to process a 3D device, the method including: providing a first wafer including first transistors and a plurality of first interconnecting metal layers; providing a second wafer; processing the second wafer to form second transistors and a plurality of second interconnecting metal layers; processing further the second wafer with a first singulation process providing a plurality of dies; placing the plurality of dies on top of the first wafer; performing a bonding process to simultaneously bond the plurality of dies to the first wafer thus forming a bonded structure; and processing the bonded structure with a second singulation process providing a plurality of bonded dies, where the bonded structure includes oxide to oxide bonding, and where the second singulation process includes an etch process.

Wafer production method

A method for producing a layer of solid material includes: providing a solid body having opposing first and second surfaces, the second surface being part of the layer of solid material; generating defects by means of multiphoton excitation caused by at least one laser beam penetrating into the solid body via the second surface and acting in an inner structure of the solid body to generate a detachment plane, the detachment plane including regions with different concentrations of defects; providing a polymer layer on the solid body; and subjecting the polymer layer to temperature conditions to generate mechanical stress in the solid body, including cooling of the polymer layer to a temperature below ambient temperature, the cooling taking place such that due to stresses a crack propagates in the solid body along the detachment plane and the layer of solid material separates from the solid body along the crack.

Semiconductor chip, semiconductor wafer and method for manufacturing semiconductor wafer
10985050 · 2021-04-20 · ·

The present disclosure relates to the technical field of semiconductors, and in particular to a semiconductor chip, a semiconductor wafer and a method for manufacturing a semiconductor wafer. The semiconductor chip comprises: a substrate, devices provided on a side of the substrate, via holes running through the substrate, conductive material filled in the via holes and contacted with the devices, and a backside metal layer provided on the other side of the substrate away from the devices, the backside metal layer coming into contact with the conductive material so as to be electrically connected to the devices via the conductive material. The semiconductor chip, the semiconductor wafer and the method for manufacturing a semiconductor wafer of the present disclosure reduce the ground resistance and improve the heat dissipation of devices with via holes structure during the operation.

REMOVABLE STRUCTURE AND REMOVAL METHOD USING THE STRUCTURE

A detachable structure comprises a carrier substrate and a silicon oxide layer positioned on the substrate at a first interface. The detachable structure is notable in that: the oxide layer has a thickness of less than 200 nm; light hydrogen and/or helium species are distributed deeply and over the entire area of the structure according to an implantation profile, a maximum concentration of which is located in the thickness of the oxide layer; the total dose of implanted light species, relative to the thickness of the oxide layer, exceeds, at least by a factor of five, the solubility limit of these light species in the oxide layer.

Reusable support substrate for formation and transfer of semiconductor devices and methods of using the same

A support substrate including a plurality of channels on a front side is provided. A cover layer is formed by anisotropically depositing a sacrificial cover material over the plurality of channels. Cavities laterally extend within the plurality of channels underneath a horizontally extending portion of the cover layer. An encapsulation layer is conformally deposited. First semiconductor devices, first metal interconnect structures, and first bonding pads are formed over a top surface of the encapsulation layer. A device substrate with second bonding pads is provided. The second bonding pads are bonded with the first bonding pads to form a bonded assembly. Peripheral portions of the encapsulation layer are removes and peripheral portions of the cover layer are physically exposed. The cover layer is removed employing an isotropic etch process by propagating an isotropic etchant through the cavities to separate the support substrate from the bonded assembly.

METHOD FOR PREPARING THE REMAINDER OF A DONOR SUBSTRATE,SUBSTRATE PRODUCED BY SAID METHOD AND USE OF SUCH A SUBSTRATE
20200385265 · 2020-12-10 ·

A method is used to prepare the remainder of a donor substrate, from which a layer has been removed by delamination in a plane weakened by ion implantation. The remainder comprises, on a main face, an annular step corresponding to a non-removed part of the donor substrate. The method comprises the deposition of a smoothing oxide on the main face of the remainder in order to fill the inner space defined by the annular step and to cover at least part of the annular step, as well as heat treatment for densification of the smoothing oxide. A substrate is produced by the method, and the substrate may be used in subsequent processes.

Combined wafer production method with a multi-component receiving layer
10707068 · 2020-07-07 · ·

The present invention relates to a method for producing solid body layers. The claimed method comprises at least the following steps: providing a solid body (2) for separating at least one solid body layer (4), arranging a receiving layer (10) on the solid body for holding the solid body layer (4), said receiving layer being made of at least one polymer and an additional material, said receiving layer, in terms of volume, be made mainly of polymer, the additional material having a greater conductivity than the polymer, and the receiving layer (10) is subjected to thermal stress, in particular, mechanical stress, for generating voltages in the solid body (2), wherein a crack in the solid body (2) along a separation plane (8) expands due to the voltages, the solid layer (4) being separated from the solid body (2) due to the crack.