The present disclosure provides a semiconductor structure and a forming method thereof. The semiconductor structure includes: a substrate, including a first side and a second side opposite to each other; a dielectric layer, provided at the first side of the substrate; a first through silicon via (TSV) structure, extending from a top surface of the dielectric layer to the first side of the substrate; and a second TSV structure, extending from the second side of the substrate to the first side of the substrate, coming into contact with the first TSV structure at the first side of the substrate, and having a preset opening width.

A barrier layer is selectively formed on a bottom surface of a recess (e.g., in which a back end of line (BEOL) conductive structure will be formed) using a combination of flash physical vapor deposition with atomic layer deposition. Additionally, a ruthenium liner is selectively deposited on sidewalls of the BEOL conductive structure using a blocking material. Accordingly, the barrier layer prevents diffusion of metal ions from the BEOL conductive structure and is thinner at the bottom surface as compared to the sidewalls in order to reduce contact resistance. Additionally, the ruthenium liner improves copper flow into the BEOL conductive structure and is thinner at the bottom surface in order to further reduce contact resistance.

An interconnection structure includes a conductive feature disposed in a first dielectric material, a first etch stop layer disposed over the first dielectric material, a second dielectric material disposed on the first etch stop layer, a conductive via extending through the second dielectric material and the first etch stop layer and in contact with at least a portion of the conductive feature, a first barrier layer disposed between the second dielectric material and the conductive via, a first liner disposed between and in contact with the first barrier layer and the conductive via, a third dielectric material disposed over the second dielectric material, a conductive line disposed in the third dielectric material and in direct contact with the conductive via, a second barrier layer disposed on the second dielectric material and in contact with the first barrier layer and the conductive line, and a second liner disposed between and in contact with the second barrier layer and the conductive line, wherein the second liner is separated from the first liner.

A semiconductor device includes an insulating layer, wherein the insulating layer has a via opening and a conductive line opening. The semiconductor device further includes a via in the via opening, wherein the via includes a first conductive material. The semiconductor device further includes a conductive line in the conductive line opening. The conductive line includes a first liner layer, wherein a first thickness of the first liner layer over the via is less than a second thickness of the first liner layer over the insulating layer, and a conductive fill comprising a second conductive material different from the first conductive material.

The present disclosure provides a semiconductor device structure with conductive plugs of different aspect ratios and manganese-containing lining layer and a method for preparing the same. The semiconductor device structure includes a substrate having a pattern-dense region and a pattern-loose region; a first conductive layer disposed over the substrate; a first dielectric layer disposed over the first conductive layer; a first conductive plug and a second conductive plug disposed in the first dielectric layer; wherein the first conductive plug and the second conductive plug comprises copper (Cu) and are separated from the first dielectric layer by the a first lining layer comprising manganese (Mn); wherein the first conductive plug and the second conductive plug have different aspect ratios.

An interconnection structure, along with methods of forming such, are described. The structure includes a dielectric material and a conductive feature extending through the dielectric material. The conductive feature includes a conductive material and has a first top surface. The structure further includes a dummy conductive feature disposed adjacent the conductive feature in the dielectric material, and the dummy conductive feature has a second top surface substantially co-planar with the first top surface. An air gap is formed in the dummy conductive feature.

Semiconductor devices and methods for forming semiconductor devices include opening at least one contact via through a sacrificial material down to contacts. Sides of the at least one contact via are lined by selectively depositing a barrier on the sacrificial material, the barrier extending along sidewalls of the at least one contact via from a top surface of the sacrificial material down to a bottom surface of the sacrificial material proximal to the contacts such that the contacts remain exposed. A conductive material is deposited in the at least one contact via down to the contacts to form stacked contacts having the hard mask on sides thereof. The sacrificial material is removed.

Provided is an interconnect structure including: a first conductive feature, disposed in a first dielectric layer; a second conductive feature, disposed over the first conductive feature and the first dielectric layer; a via, disposed between the first and second conductive features and being in direct contact with the first and second conductive features; and a barrier structure, lining a sidewall and a portion of a bottom surface of the second conductive feature, a sidewall of the via, a portion of a top surface of the first conductive feature, and a top surface of the first dielectric layer.

A method of making a semiconductor device includes etching an insulating layer to form a first opening and a second opening. The method further includes depositing a conductive material in the first opening. The method further includes performing a surface modification process on the conductive material. The method further includes depositing, after the surface modification process, a first liner layer in the second opening, wherein the first liner layer extends over the conductive material and the insulating layer. The method further includes depositing a conductive fill over the first liner layer, wherein the conductive fill includes a different material from the conductive material.

A semiconductor device is provided. The semiconductor device includes: a first interlayer insulating film defining a lower wiring trench; a lower wiring structure including a first lower barrier film which extends along sidewalls of the lower wiring trench, and a lower filling film which is on the first lower barrier film; a second interlayer insulating film on the first interlayer insulating film, the second interlayer insulating film defining an upper wiring trench which exposes at least part of the lower wiring structure; and an upper wiring structure provided in the upper wiring trench and connected to the lower wiring structure. An upper surface of the first lower barrier film is closer to a bottom surface of the lower wiring trench than each of an upper surface of the first interlayer insulating film and an upper surface the lower filling film. The upper surface of the first lower barrier film is concave.