An image sensor device includes a transistor disposed in a pixel region; a salicide block layer covering the pixel region; a first ILD layer covering the salicide block layer; a second ILD layer on the first ILD layer; a source contacts extending through the second and first ILD layers and the salicide block layer, and including first polysilicon plug in the first ILD layer, first self-aligned silicide layer on the polysilicon plug and first conductive metal layer on the first self-aligned silicide layer; and a drain contact extending through the second and first ILD layers and the salicide block, and including second polysilicon plug in first ILD layer, second self-aligned silicide layer on the second polysilicon plug, and second conductive metal layer on the second self-aligned silicide layer.

To provide an imaging device that allows miniaturization to be achieved in an in-plane direction without impairing operation performance. This imaging device includes a first pixel and a second pixel. The first pixel includes m (m represents an integer greater than or equal to 2) first wiring lines and m first gate electrodes that are coupled to the m respective first wiring lines. The second pixel includes n (n represents a natural number smaller than m) second wiring lines and n second gate electrodes that are coupled to the n respective second wiring lines.

The present technology relates to an imaging device of global shutter type, and relates to an imaging device and electronic equipment capable of inhibiting interference between a photoelectric conversion unit and an element that holds charge that has been transferred from the photoelectric conversion unit. An imaging device includes, in a pixel: a photoelectric conversion unit; a charge transfer unit; an electrode that is used to transfer charge from the photoelectric conversion unit to the charge transfer unit; a charge-voltage conversion unit; and a charge drain unit. Here, the charge transfer unit is allowed to transfer charge in a first transfer direction to the charge-voltage conversion unit and a second transfer direction to the charge drain unit. The present technology can be applied to, for example, a CMOS image sensor of global shutter type.

A manufacturing method of an image sensor including the following steps is provided. A substrate is provided. A light sensing device is formed in the substrate. A storage node is formed in the substrate. The storage node and the light sensing device are separated from each other. A buried gate structure is formed in the substrate. The buried gate structure includes a buried gate and a first dielectric layer. The buried gate is disposed in the substrate and covers at least a portion of the storage node. The first dielectric layer is disposed between the buried gate and the substrate. A first light shielding layer is formed on the buried gate. The first light shielding layer is located above the storage node and electrically connected to the buried gate.

An image sensor may include a first photo gate and a second photo gate each extending substantially in parallel in a first direction, the first photo gate and the second photo gate isolated from direct contact with each other in a second direction, the second direction substantially orthogonal to the first direction, a first overflow gate between the first photo gate and the second photo gate, the first overflow gate extending in the first direction, a first charge collection region on the first photo gate, a second charge collection region on the second photo gate and isolated from direct contact with the first charge collection region in the second direction, a first floating diffusion region that may receive first charge from the first charge collection region and output the first charge, and a second floating diffusion region that may receive second charge from the second charge collection region and output the second charge.

A pixel cell includes a plurality of subpixels to generate image charge in response to incident light. The subpixels include an inner subpixel laterally surrounded by outer subpixels. A first plurality of transfer gates disposed proximate to the inner subpixel and a first grouping of outer subpixels. A first floating diffusion is coupled to receive the image charge from the first grouping of outer subpixels through a first plurality of transfer gates. A second plurality of transfer gates disposed proximate to the inner subpixel and the second grouping of outer subpixels. A second floating diffusion disposed in the semiconductor material and coupled to receive the image charge from each one of the second grouping of outer subpixels through the second plurality of transfer gates. The image charge in the inner subpixel is received by the first, second, or both floating diffusions through respective transfer gates.

[Object] There are provided a solid-state imaging device that can minimize a decrease in layout efficiency due to trenches and a method of producing the same.

[Solution] A solid-state imaging device of the present disclosure includes a substrate including one or more vertical trenches extending in a longitudinal direction and a horizontal trench that extends in a lateral direction and is connected to the one or more vertical trenches, wherein the horizontal trench is provided between a photoelectric conversion unit and a charge holding unit in the substrate and includes a light-blocking film, and wherein the one or more vertical trenches include a first trench having a first width and including the light-blocking film, and a second trench having a second width narrower than the first width and not including the light-blocking film, or a third trench including a first part having a third width and including the light-blocking film and a second part having a fourth width narrower than the third width and not including the light-blocking film.

Improvement of noise characteristics is achievable. A solid-state imaging device according to an embodiment includes a plurality of photoelectric conversion elements (333) arranged in a two-dimensional grid shape in a matrix direction and each generating a charge corresponding to a received light amount, and a detection unit (400) that detects a photocurrent produced by the charge generated in each of the plurality of photoelectric conversion elements. A chip (201a) on which the photoelectric conversion elements are disposed and a chip (201b) on which at least a part of the detection unit is disposed are different from each other.

Methods of forming trench structures of different depths in a semiconductor substrate are provided. A first mask forming a first opening and a second opening is provided on the semiconductor substrate. The semiconductor substrate is etched through the first and second openings, thereby forming a first trench and a second trench. Trench structure material is deposited in the first and second trenches, thereby forming first and second trench structures. A second mask is provided on the first mask, wherein the second mask covers the first opening and has a third opening superimposed over the second opening of the first mask. The second trench structure is etched through the second opening of the first mask and through the third opening of the second mask.

A semiconductor device, a semiconductor device manufacturing method, and an image capturing device capable of suppressing variations in transistor characteristics. The semiconductor device includes a semiconductor substrate, and a field effect transistor. The field effect transistor includes a semiconductor region having a channel, a gate electrode covering the semiconductor region, and a gate insulating film. The semiconductor region has a top face, and a first side face at one side of the top face in a gate width direction of the gate electrode. The gate electrode has a first part facing the top face over the gate insulating film, and a second part facing the first side face over the gate insulating film. A first end face of the first part and a second end face of the second part are flush at at least one end of the gate electrode in a gate length direction.