Aspects of the present disclosure relate to techniques for reducing skew in an integrated device, such as a CMOS imaging device. In some aspects, multiple pixels of an integrated circuit may be configured to receive a same control signal and conduct charge carriers responsive to the control signal substantially at the same time. In some aspects, an integrated circuit may have modulated charge transfer channel voltage thresholds, such as by having different charge transfer channel lengths, and/or a doped portion configured to set a voltage threshold for charge transfer. In some aspects, an integrated circuit may have a via structure having a plurality of vias extending between continuous portions of at least two metal layers. In some aspects, an integrated circuit may include a row of pixels and a voltage source configured to provide a voltage to bias a semiconductor substrate of the integrated circuit along the row of pixels.

A peripheral area of the display panel is provided with a photosensitive TFT structure, the photosensitive TFT structure includes a reference TFT unit and a photosensitive TFT unit, first electrodes of a reference TFT included in the reference TFT unit and a photosensitive TFT included in the photosensitive TFT unit are connected to a signal input terminal of the photosensitive TFT structure; a second electrode of the reference TFT is connected to a second signal line of the photosensitive TFT structure; a second electrode of the photosensitive TFT is connected to a third signal line of the photosensitive TFT structure; a gate electrode of the reference TFT is connected to a first control terminal of the photosensitive TFT structure, and a gate electrode of the photosensitive TFT is connected to a second control terminal of the photosensitive TFT structure.

Image sensors include a photodiode disposed in a semiconductor substrate and a transistor operatively coupled to the photodiode. The transistor includes a nonplanar structure disposed in the semiconductor substrate, which is bounded by two outer trench structures formed in the semiconductor substrate. Isolation deposits are disposed within the two outer trench structures formed in the semiconductor substrate. A gate includes a planar gate and two fingers extending into one of two inner trench structures formed in the semiconductor substrate between the nonplanar structure and a respective one of the two outer trench structures. This structure creates an electron channel extending along a plurality of sidewall portions of the nonplanar structure in a channel width plane.

An X-ray detection device includes a substrate, a first transistor disposed on the substrate and including a silicon semiconductor, a second transistor disposed on the substrate and including a metal oxide semiconductor, a sensor disposed on the first transistor and the second transistor and electrically connected to the first transistor and the second transistor, a first barrier layer disposed between the first transistor and the second transistor, and a second barrier layer disposed between the second transistor and the sensor. The X-ray detection device may further include a scintillator disposed on the sensor.

A touch screen panel using a thin film transistor (TFT) photodetector includes a touch panel including a plurality of unit patterns for sensing light reflected by a touch by using a TFT photodetector including an active layer formed of amorphous silicon or polycrystalline silicon on an amorphous transparent material, and a controller configured to scan the plurality of unit patterns and read touch coordinates as a result of the scanning.

A small-sized and highly functional imaging device is provided. The imaging device includes a photoelectric conversion device formed on a silicon substrate and a transistor including a channel formation region in a silicon epitaxial growth layer formed on the silicon substrate. The transistor provided in the epitaxial growth layer has favorable electrical characteristics, so that the imaging device with little noise can be formed. Since the transistor can be formed so as to have a region overlapping with the photoelectric conversion device, the imaging device can be downsized.

Aspects of the technology described herein relate to improved semiconductor-based image sensor designs. In some embodiments, an integrated circuit may comprise a photodetection region, an auxiliary region electrically coupled to the photodetection region by a first semiconductor device, and a drain region electrically coupled to the auxiliary region via a second semiconductor device. In some embodiments, a drain device may be configured with a gate controlling the flow of charge carriers to the drain region. In some embodiments, the flow of charge carriers to the drain region may occur via the second device. In some embodiments, the second device may be a diode-connected transistor. In some embodiments, the first and second semiconductor devices may advantageously decouple properties of the drain region from properties of the auxiliary region. In some embodiments, an integrated circuit may comprise a plurality of pixels and a control circuit configured to control a transfer of charge carriers in the plurality of pixels.

Methods and systems for image sensing are provided. In one example, an apparatus comprises a semiconductor substrate comprising a light incident surface to receive light, a first pinned photodiode, and a second pinned photodiode, the first pinned photodiode and the second pinned photodiode forming a stack structure in the semiconductor substrate along an axis perpendicular to the light incident surface, the stack structure enabling the first pinned photodiode and the second pinned photodiode to, respectively, convert a first component of the light and a second component of the light to first charge and second charge. The apparatus further comprises one or more capacitors formed in the semiconductor substrate and configured to generate a first voltage and a second voltage based on, respectively, the first charge and the second charge.

Various embodiments of the present disclosure are directed towards an image sensor. The image sensor includes a first semiconductor substrate having a photodetector and a floating diffusion node. A transfer gate is disposed over the first semiconductor substrate, where the transfer gate is at least partially disposed between opposite sides of the photodetector. A second semiconductor substrate is vertically spaced from the first semiconductor substrate, where the second semiconductor substrate comprises a first surface and a second surface opposite the first surface. A readout transistor is disposed on the second semiconductor substrate, where the second surface is disposed between the transfer gate and a gate of the readout transistor. A first conductive contact is electrically coupled to the transfer gate and extending vertically from the transfer gate through both the first surface and the second surface.

An image sensor includes a pixel array including first pixels and second pixels, each of the first and second pixels including photodiodes, a sampling circuit detecting a reset voltage and a pixel voltage from the first and second pixels and generating an analog signal, an analog-to-digital converter image data from the analog signal, and a signal processing circuit generating an image using the image data. Each of the first pixels includes a first conductivity-type well separating the photodiodes and having impurities of a first conductivity-type. The photodiodes have impurities of a second conductivity-type different from the first conductivity-type. Each of the second pixels includes a second conductivity-type well separating the photodiodes and having impurities of the second conductivity-type different from the first conductivity-type. A potential level of the second conductivity-type well is higher than a potential level of the first conductivity-type well.