Patent classifications
H01L27/14818
CMOS IMAGE SENSOR WITH DUAL DAMASCENE GRID DESIGN HAVING ABSORPTION ENHANCEMENT STRUCTURE
The present disclosure, in some embodiments, relates to a method of forming an image sensor integrated chip. The method may be performed by forming an image sensing element within a substrate, and forming an absorption enhancement structure over a back-side of the substrate. The absorption enhancement structure is selectively etched to concurrently define a plurality of grid structure openings and a ground structure opening within the absorption enhancement structure. A grid structure is formed within the plurality of grid structure openings and a ground structure is formed within the ground structure opening. The grid structure extends from over the absorption enhancement structure to a location within the absorption enhancement structure.
SOLID STATE IMAGING DEVICE FOR REDUCING DARK CURRENT, METHOD OF MANUFACTURING THE SAME, AND IMAGING APPARATUS
A solid state imaging device having a light sensing section that performs photoelectric conversion of incident light includes: an insulating layer formed on a light receiving surface of the light sensing section; a layer having negative electric charges formed on the insulating layer; and a hole accumulation layer formed on the light receiving surface of the light sensing section.
Solid-state imaging device, manufacturing method of solid-state imaging device and electronic apparatus
A solid-state imaging device includes a pixel having a photoelectric conversion element which generates a charge in response to incident light, a first transfer gate which transfers the charge from the photoelectric conversion element to a charge holding section, and a second transfer gate which transfers the charge from the charge holding section to a floating diffusion. The first transfer gate includes a trench gate structure having at least two trench gate sections embedded in a depth direction of a semiconductor substrate, and the charge holding section includes a semiconductor region positioned between adjacent trench gate sections.
Curable composition, method for producing cured film, color filter, light-shielding film, solid-state imaging element, and image display device
An object of the present invention is to provide a curable composition satisfying both of excellent low reflectivity and excellent developability, a method for producing a cured film, an infrared color filter provided with a light-shielding film, and a solid-state imaging device.
The curable composition of the present invention includes a fluorine-containing polymer including a repeating unit represented by Formula (A) and a repeating unit represented by Formula (B), a polymerizable compound, and a coloring agent.
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In Formula (A), R.sup.1 represents a hydrogen atom or an alkyl group, and L.sup.1 represents a divalent chained linking group having 3 or more carbon atoms in total, which may include an ester bond.
In Formula (B), R.sup.2 represents a hydrogen atom or an alkyl group, L.sup.2 represents a single bond or a divalent linking group, and R.sup.f represents a monovalent organic group including an fluorine atom.
METHOD FOR DRIVING SOLID-STATE IMAGING DEVICE
Provided is a method for driving a solid-state imaging device including a unit pixel which includes at least a first pixel including: a photoelectric converter which receives reflected light from an object and converts the reflected light into charge; an exposure resetter which switches between exposure and discharge of the charge in the photoelectric converter; and a plurality of readers which read the charge from the photoelectric converter and include at least a first reader and a second reader. The method includes: performing a first exposure as the exposure that is performed in a first period in which a gate of the first reader is ON; and performing a second exposure as the exposure that is performed in a second period which is started in conjunction with the end of the first period and in which a gate of the second reader is ON.
CMOS IMAGE SENSOR WITH DUAL DAMASCENE GRID DESIGN HAVING ABSORPTION ENHANCEMENT STRUCTURE
The present disclosure relates to an image sensor integrated chip having a grid structure that reduces crosstalk between pixel regions of an image sensor chip. In some embodiments, the integrated chip has an image sensing element arranged within a substrate. An absorption enhancement structure is disposed along the back-side of the substrate. A grid structure is arranged over the absorption enhancement structure. The grid structure defines an opening arranged over the image sensing element and extends from over the absorption enhancement structure to a location within the absorption enhancement structure. By having the grid structure extend into the absorption enhancement structure, the grid structure is able to reduce crosstalk between adjacent image sensing elements by blocking radiation reflected off of non-planar surfaces of the absorption enhancement structure from traveling to an adjacent pixel region.
CMOS image sensor with dual damascene grid design having absorption enhancement structure
The present disclosure relates to an image sensor integrated chip having a grid structure that reduces crosstalk between pixel regions of an image sensor chip. In some embodiments, the integrated chip has an image sensing element arranged within a substrate. An absorption enhancement structure is disposed along the back-side of the substrate. A grid structure is arranged over the absorption enhancement structure. The grid structure defines an opening arranged over the image sensing element and extends from over the absorption enhancement structure to a location within the absorption enhancement structure. By having the grid structure extend into the absorption enhancement structure, the grid structure is able to reduce crosstalk between adjacent image sensing elements by blocking radiation reflected off of non-planar surfaces of the absorption enhancement structure from traveling to an adjacent pixel region.
SOLID-STATE IMAGING DEVICE, IMAGING SYSTEM, AND METHOD FOR MANUFACTURING SOLID-STATE IMAGING DEVICE
A solid-state imaging device includes a light-shielding layer that is disposed in a pixel region containing a pixel including a photoelectric conversion element and a charge holding portion and a peripheral region in which a signal from the pixel is processed and that is electrically connected to a substrate at a contact portion in the peripheral region, a first insulating layer that has an end portion between the charge holding portion and the contact portion in plan view and that is disposed between the substrate and the light-shielding layer, and a first insulating member that is disposed on a side surface of the end portion of the first insulating layer and that buffers a step due to the end portion. A portion of the light-shielding layer overlapping the first insulating member in the plan view has an upper surface having a shape following a shape of the first insulating member.
PHOTOELECTRIC CONVERSION APPARATUS AND IMAGE PICKUP SYSTEM
A photoelectric conversion apparatus includes a plurality of units each including a charge generation region disposed in a semiconductor layer. Each of a first unit and a second unit of the plurality of units includes a charge storage region configured to store charges transferred thereto from the charge generation region, a dielectric region located above the charge generation region and surrounded by an insulator layer, and a first light-shielding layer covering the charge storage region that is located between the insulator layer and the semiconductor layer, and the first light-shielding layer having an opening located above the charge generation region. The charge generation region of the first unit is able to receive light through the opening of the first light-shielding layer. The charge generation region of the second unit is covered with a second light-shielding layer.
Single-photon avalanche diode and an array thereof
A Single-Photon Avalanche Diode (SPAD) is disclosed. The SPAD may include an active region for detection of incident radiation, and a cover configured to shield part of the active region from the incident radiation. An array is also disclosed and includes SPADs arranged in rows and columns. A method for making the SPAD is also disclosed.