A semiconductor device includes a vertical column of wire bonds on substrate contact fingers of the device. Semiconductor dies are mounted on a substrate, and electrically coupled to the substrate such that groups of semiconductor dies may have bond wires extending to the same contact finger on the substrate. By bonding those wires to the contact finger in a vertical column, as opposed to separate, side-by-side wire bonds on the contact finger, an area of the contact finger may be reduced.

Even in a case where a pad becomes smaller, solder connection strength is improved. A semiconductor device includes a pad, a diffusion layer, and a melting layer. The pad included by the semiconductor device includes a concave portion on a surface at which solder connection is to be performed. The diffusion layer included by the semiconductor device is disposed at the concave portion and constituted with a metal which remains on the surface of the pad while diffusing into solder upon the solder connection. The melting layer included by the semiconductor device is disposed adjacent to the diffusion layer and constituted with a metal which diffuses and melts into the solder upon the solder connection.

A semiconductor device includes a semiconductor part; an electrode selectively provided on the semiconductor part, the electrode being electrically connected to the semiconductor part; and multiple metal layers provided on the electrode. A method of manufacturing the semiconductor device includes selectively forming a first metal layer on the electrode; forming a palladium layer on the first metal layer, the palladium layer covering the first metal layer; forming a second metal layer on the palladium layer, the second metal layer covering the palladium layer; and forming a gold layer directly on the palladium layer by replacing the second metal layer with the gold layer.

An amplifier circuit including a semiconductor element is formed on a substrate. A protection circuit is formed including a plurality of protection diodes that are formed on the substrate and that are connected in series with each other, the protection circuit being connected to an output terminal of the amplifier circuit. A pad conductive layer is formed that at least partially includes a pad for connecting to a circuit outside the substrate. An insulating protective film covers the pad conductive layer. The insulating protective film includes an opening that exposes a partial area of a surface of the pad conductive layer, and that covers another area. A first bump is formed on the pad conductive layer on a bottom surface of the opening, and a second bump at least partially overlaps the protection circuit in plan view and is connected to a ground (GND) potential connected to the amplifier circuit.

According to one embodiment, a semiconductor device includes a first semiconductor layer on a semiconductor substrate and a second semiconductor layer on the first semiconductor layer. The first semiconductor layer is between the second semiconductor layer and the semiconductor substrate in a first direction. A first conductive layer is on the second semiconductor layer and contacting the second semiconductor layer. A third semiconductor layer is spaced from the second semiconductor layer in a second direction and connected to the first semiconductor layer. A second conductive layer is spaced from the first conductive layer in the second direction and connected to the third semiconductor layer. Each of the first semiconductor layer, the second semiconductor layer, and the third semiconductor layer extends lengthwise in a third direction intersecting the first direction and the second direction.

The present technology relates to a semiconductor device including semiconductor dies formed with vertical die bond pads on an edge of the dies. During wafer fabrication, vertical bond pad blocks are formed in scribe lines of the wafer and electrically coupled to the die bond pads of the semiconductor dies. The vertical bond pad blocks are cut through during wafer dicing, thereby leaving large, vertically oriented pads exposed on a vertical edge of each semiconductor die.

In a semiconductor device, a semiconductor element includes a semiconductor substrate, a surface electrode and a protective film. The semiconductor substrate has an active region and an outer peripheral region. The surface electrode includes a base electrode disposed on a front surface of the semiconductor substrate and a connection electrode disposed on the base electrode. The protective film covers a peripheral end portion of the base electrode and an outer peripheral edge of the connection electrode. The protective film has an opening to expose the connection electrode so as to enable a solder connection. A boundary between the outer peripheral edge of the connection electrode and the protective film is located at a position corresponding to the outer peripheral region in a plan view.

A fingerprint sensor device and a method of making a fingerprint sensor device. As non-limiting examples, various aspects of this disclosure provide various fingerprint sensor devices, and methods of manufacturing thereof, that comprise an interconnection structure, for example a bond wire, at least a portion of which extends into a dielectric layer utilized to mount a plate, and/or that comprise an interconnection structure that extends upward from the semiconductor die at a location that is laterally offset from the plate.

A method includes depositing a first dielectric layer covering an electrical connector, depositing a second dielectric layer over the first dielectric layer, and performing a first etching process to etch-through the second dielectric layer and the first dielectric layer. An opening is formed in the first dielectric layer and the second dielectric layer to reveal the electrical connector. A second etching process is performed to laterally etch the first dielectric layer and the second dielectric layer. An isolation layer is deposited to extend into the opening. The isolation layer has a vertical portion and a first horizontal portion in the opening, and a second horizontal portion overlapping the second dielectric layer. An anisotropic etching process is performed on the isolation layer, with the vertical portion of the isolation layer being left in the opening.

A semiconductor device comprises a semiconductor substrate, a conductive pad over the semiconductor substrate, a conductive bump over the conductive pad, a conductive cap over the conductive bump, and a passivation layer over the semiconductor substrate and surrounding the conductive bump. A combination of the conductive bump and the conductive cap has a stepped sidewall profile. The passivation layer has an inner sidewall at least partially facing and spaced apart from an outer sidewall of the conductive bump.