H01L2224/02166

SEMICONDUCTOR DEVICES COMPRISING GETTER LAYERS AND METHODS OF MAKING AND USING THE SAME

Semiconductor devices comprising a getter material are described. The getter material can be located in or over the active region of the device and/or in or over a termination region of the device. The getter material can be a conductive or an insulating material. The getter material can be present as a continuous or discontinuous film. The device can be a SiC semiconductor device such as a SiC vertical MOSFET. Methods of making the devices are also described. Semiconductor devices and methods of making the same comprising source ohmic contacts formed using a self-aligned process are also described. The source ohmic contacts can comprise titanium silicide and/or titanium silicide carbide and can act as a getter material.

Collars for under-bump metal structures and associated systems and methods

The present technology is directed to manufacturing collars for under-bump metal (UBM) structures for die-to-die and/or package-to-package interconnects and associated systems. A semiconductor die includes a semiconductor material having solid-state components and an interconnect extending at least partially through the semiconductor material. An under-bump metal (UBM) structure is formed over the semiconductor material and is electrically coupled to corresponding interconnects. A collar surrounds at least a portion of the side surface of the UBM structure, and a solder material is disposed over the top surface of the UBM structure.

Semiconductor device and semiconductor package comprising the same

A semiconductor device is provided. The semiconductor device includes: a substrate which includes a semiconductor chip region and a scribe line region surrounding the semiconductor chip region; an insulating film arranged over the semiconductor chip region and the scribe line region on the substrate, and including a first surface, a second surface opposite to the first surface, a third surface connecting the first surface and the second surface, and a fourth surface opposite to the third surface and connecting the first surface and the second surface; and an opening portion formed on the second surface of the insulating film and the fourth surface of the insulating film to expose the substrate, wherein the opening portion is formed in the scribe line region, and the first surface of the insulating film and the third surface of the insulating film do not include an opening portion which expose the substrate.

SEMICONDUCTOR DEVICE HAVING AN ELECTRICAL CONNECTION BETWEEN SEMICONDUCTOR CHIPS ESTABLISHED BY WIRE BONDING, AND METHOD FOR MANUFACTURING THE SAME
20200411465 · 2020-12-31 ·

A method for manufacturing a semiconductor device includes (i) a step of preparing a first semiconductor chip having a first electrode pad thereon and a second semiconductor chip having a second electrode pad thereon and larger in thickness than the first semiconductor chip, the second electrode pad being larger in size than the first electrode pad, (ii) a step of mounting the first semiconductor chip and the second semiconductor chip on the same planarized surface of a substrate having a uniform thickness, (iii) a step of bonding a ball formed by heating and melting a bonding wire to the second electrode pad, (iv) a step of first-bonding the bonding wire to the first electrode pad, and (v) a step of second-bonding the bonding wire to the ball.

Package structure and method of fabricating package structure

A package structure in accordance with some embodiments may include an RFIC chip, a redistribution circuit structure, a backside redistribution circuit structure, an isolation film, a die attach film, and an insulating encapsulation. The redistribution circuit structure and the backside redistribution circuit structure are disposed at two opposite sides of the RFIC chip and electrically connected to the RFIC chip. The isolation film is disposed between the backside redistribution circuit structure and the RFIC chip. The die attach film is disposed between the RFIC chip and the isolation film. The insulating encapsulation encapsulates the RFIC chip and the isolation film between the redistribution circuit structure and the backside redistribution circuit structure. The isolation film may have a coefficient of thermal expansion lower than the insulating encapsulation and the die attach film.

ELECTRONIC DEVICE
20200399118 · 2020-12-24 ·

A electronic device includes a substrate, a first metal film, an insulating film, a second metal film, and a third metal film. The substrate has one surface. The first metal film is disposed on the one surface. The insulating film is disposed on the one surface in a state covering the first metal film. The insulating film has a contact hole exposing the first metal film. The second metal film is disposed on a portion of the first metal film exposed from the contact hole and a periphery of the contact hole. The third metal film is made of gold and disposed on the second metal film. The first metal film, the second metal film, and the third metal film are stacked as a pad portion.

Fabrication method of semiconductor structure

The present invention provides a semiconductor structure and a method of fabricating the same. The method includes: providing a chip having conductive pads, forming a metal layer on the conductive pads, forming a passivation layer on a portion of the metal layer, and forming conductive pillars on the metal layer. Since the metal layer is protected by the passivation layer, the undercut problem is solved, the supporting strength of the conductive pillars is increased, and the product reliability is improved.

Fabrication method of semiconductor structure

The present invention provides a semiconductor structure and a method of fabricating the same. The method includes: providing a chip having conductive pads, forming a metal layer on the conductive pads, forming a passivation layer on a portion of the metal layer, and forming conductive pillars on the metal layer. Since the metal layer is protected by the passivation layer, the undercut problem is solved, the supporting strength of the conductive pillars is increased, and the product reliability is improved.

Chip package structure with dummy bump and method for forming the same

A method for forming a chip package structure is provided. The method includes bonding a chip to a first surface of a first substrate. The method includes forming a dummy bump over a second surface of the first substrate. The first surface is opposite the second surface, and the dummy bump is electrically insulated from the chip. The method includes cutting through the first substrate and the dummy bump to form a cut substrate and a cut dummy bump. The cut dummy bump is over a corner portion of the cut substrate, a first sidewall of the cut dummy bump is substantially coplanar with a second sidewall of the cut substrate, and a third sidewall of the cut dummy bump is substantially coplanar with a fourth sidewall of the cut substrate.

Mutli-chip package with encapsulated conductor via

A semiconductor device and a manufacturing method thereof are provided. The semiconductor device includes a first semiconductor die, at least one first conductive connector disposed beside the first semiconductor die and electrically coupled to the first semiconductor die, an insulating encapsulation laterally encapsulating the first semiconductor die and the at least one first conductive connector, and a redistribution structure disposed on the insulating encapsulation and being in contact with the first semiconductor die and the at least one first conductive connector. A thickness of the at least one first conductive connector is less than a thickness of the insulating encapsulation.