Wafers include multiple bulk redistribution layers. A terminal contact pad is on a surface of one of the bulk redistribution layers. A final redistribution layer is formed on the surface and in contact with the terminal contact pad. The final redistribution layer is formed from a material other than a material of the plurality of bulk redistribution layers. A solder ball is formed on the terminal contact pad.

Methods of forming connector pad structures, interconnect structures, and structures thereof are disclosed. In some embodiments, a method of forming a connector pad structure includes forming an underball metallization (UBM) pad, and increasing a surface roughness of the UBM pad by exposing the UBM pad to a plasma treatment. A polymer material is formed over a first portion of the UBM pad, leaving a second portion of the UBM pad exposed.

A semiconductor device includes a semiconductor substrate, a conductive pad over the semiconductor substrate, a conductor over the conductive pad, a polymeric material over the semiconductor substrate and surrounding the conductor, and a seed layer between the polymeric material and the conductor. A top surface of the conductor, a top surface of the polymeric material and a top surface of the seed layer are substantially coplanar.

An apparatus including an electrostatic discharge circuit including a first circuit portion coupled beneath a die contact pad of an integrated circuit die and a second circuit portion in an interposer separate from the integrated circuit die, the interposer including a first contact point coupled to the contact pad of the integrated circuit die and a second contact point operable for connection to an external source. A method including forming an integrated circuit die including a first electrostatic discharge structure beneath a contact pad of the die; and coupling the die to an interposer including an interposer contact and a second electrostatic discharge structure, wherein a signal at the contact pad of the die is operable to be routed through the interposer.

A semiconductor device according to the present invention includes a first conductive-type Sic semiconductor layer, and a Schottky metal, comprising molybdenum and having a thickness of 10 nm to 150 nm, that contacts the surface of the SiC semiconductor layer. The junction of the SiC semiconductor layer to the Schottky metal has a planar structure, or a structure with recesses and protrusions of equal to or less than 5 nm.

A manufacturing method of a semiconductor package includes: laterally covering a sensing die with an encapsulant, where the encapsulant includes a top surface and a rounded inner edge connected to the top surface, and a top surface of the sensing die is lower than the rounded inner edge of the encapsulant and is smoother than the top surface of the encapsulant; and forming a redistribution structure on the top surface of the encapsulant and the top surface of the sensing die.

A biosensor system package includes: a transistor structure in a semiconductor layer having a front side and a back side, the transistor structure comprising a channel region; a buried oxide (BOX) layer on the back side of the semiconductor layer, wherein the buried oxide layer has an opening on the back side of the channel region, and an interface layer covers the back side over the channel region; a multi-layer interconnect (MLI) structure on the front side of the semiconductor layer, the transistor structure being electrically connected to the MLI structure; and a cap structure attached to the buried oxide layer, the cap structure comprising a microneedle.

An SiC semiconductor device includes an SiC chip having a first main surface at one side and a second main surface at another side, a first main surface electrode including a first Al layer and formed on the first main surface, a pad electrode formed on the first main surface electrode and to be connected to a lead wire, and a second main surface electrode including a second Al layer and formed on the second main surface.

A semiconductor device includes: a semiconductor layer including a semiconductor substrate and an epitaxial layer of a first conductivity type formed on the semiconductor substrate; a surface electrode containing at least one selected from the group consisting of an aluminum alloy and aluminum and formed on the semiconductor layer; and an impurity region of a second conductivity type formed on a surface layer portion of the epitaxial layer and forming a pn junction with the epitaxial layer, wherein the surface electrode includes a Schottky portion that is in contact with a surface of the semiconductor layer and forms a Schottky junction with the epitaxial layer.

A semiconductor device includes an inverter circuit having a first switching element and a second switching element, a first control circuit, a second control circuit, and a limiting unit. The first switching element is supplied with a power supply voltage. The second switching element includes a first terminal connected to the first switching element, a second terminal connected to ground, and a control terminal. The first control circuit controls the first switching element. The second control circuit controls the second switching element. The limiting unit reduces fluctuation in voltage between the second terminal and the control terminal based on voltage fluctuation at the second terminal of the second switching element.