A mechanism of a semiconductor structure with composite barrier layer under redistribution layer is provided. A semiconductor structure includes a substrate comprising a top metal layer on the substrate; a passivation layer over the top metal layer having an opening therein exposing the top metal layer; a composite barrier layer over the passivation layer and the opening, the composite barrier layer includes a center layer, a bottom layer, and an upper layer, wherein the bottom layer and the upper layer sandwich the center layer; and a redistribution layer (RDL) over the composite barrier layer and electrically connecting the underlying top metal layer.

A device and method of preventing corrosion of a copper layer in a PCB is disclosed. A first dielectric is disposed on a substrate. A copper layer is plated in an opening in the first dielectric and, after conditioning the copper layer, a redistribution layer is plated on the copper layer. A solder resist layer is disposed above the copper layer. A solder ball is disposed in an opening in the solder resist layer. The solder ball is in conductive contact with the copper layer and in physical contact with the redistribution layer. A non-conductive carbon layer is disposed on and in contact with the redistribution layer or tsi-diehe solder resist layer. The carbon layer is substantially thinner than the copper layer and acts as a diffusion barrier to moisture for the copper layer.

A device and method of preventing corrosion of a copper layer in a PCB is disclosed. A first dielectric is disposed on a substrate. A copper layer is plated in an opening in the first dielectric and, after conditioning the copper layer, a redistribution layer is plated on the copper layer. A solder resist layer is disposed above the copper layer. A solder ball is disposed in an opening in the solder resist layer. The solder ball is in conductive contact with the copper layer and in physical contact with the redistribution layer. A non-conductive carbon layer is disposed on and in contact with the redistribution layer or tsi-diehe solder resist layer. The carbon layer is substantially thinner than the copper layer and acts as a diffusion barrier to moisture for the copper layer.

A method of manufacturing a bump structure includes forming a passivation layer over a substrate. A metal pad structure is formed over the substrate, wherein the passivation layer surrounds the metal pad structure. A polyimide layer including a polyimide is formed over the passivation layer and the metal pad structure. A metal bump is formed over the metal pad structure and the polyimide layer. The polyimide is a reaction product of a dianhydride and a diamine, wherein at least one of the dianhydride and the diamine comprises one selected from the group consisting of a cycloalkane, a fused ring, a bicycloalkane, a tricycloalkane, a bicycloalkene, a tricycloalkene, a spiroalkane, and a heterocyclic ring.

A display device includes a substrate including a display region, and a peripheral region that is outside of the display region, a plurality of dummy pads at the peripheral region, an insulating layer covering the plurality of dummy pads, wherein top surfaces of first portions of the insulating layer above the plurality of dummy pads are higher than top surfaces of second portions of the insulating layer between the plurality of dummy pads, and a plurality of pads over the second portions of the insulating layer at the peripheral region.

A semiconductor device (10) includes: a substrate (1); a wiring (6) formed above the substrate (1); a titanium nitride film (7) formed on the wiring (6); an oxide film (3) formed on the titanium nitride film (7); a silicon nitride film (4) formed on the oxide film (3); and a pad portion (8) exposing the wiring (6), and formed at a place where a first opening portion (91) formed in the silicon nitride film (4) and a second opening portion (92) formed in the titanium nitride film (7) overlap with each other in plan view, and being inside a third opening portion (93) formed in the oxide film (3) in plan view, wherein the silicon nitride film (4) is formed on top of and in contact with the titanium nitride film (7) inside the third opening portion (93) in plan view.

A semiconductor device (10) includes: a substrate (1); a wiring (6) formed above the substrate (1); a titanium nitride film (7) formed on the wiring (6); an oxide film (3) formed on the titanium nitride film (7); a silicon nitride film (4) formed on the oxide film (3); and a pad portion (8) exposing the wiring (6), and formed at a place where a first opening portion (91) formed in the silicon nitride film (4) and a second opening portion (92) formed in the titanium nitride film (7) overlap with each other in plan view, and being inside a third opening portion (93) formed in the oxide film (3) in plan view, wherein the silicon nitride film (4) is formed on top of and in contact with the titanium nitride film (7) inside the third opening portion (93) in plan view.

A semiconductor chip includes: a semiconductor substrate; a pad insulating layer on the semiconductor substrate; a through electrode which penetrates the semiconductor substrate and the pad insulating layer and includes a conductive plug and a conductive barrier layer surrounding a sidewall of the conductive plug; and a bonding pad which surrounds a sidewall of the through electrode and is spaced apart from the conductive plug with the conductive barrier layer disposed therebetween.

Provided is a semiconductor device that is resistant to the corrosion of titanium nitride forming an anti-reflection film. The semiconductor device includes: a wiring layer which includes a wiring film made of aluminum or an aluminum alloy and formed on a substrate and a titanium nitride film formed on the wiring film; a protection layer which covers a top surface and a side surface of the wiring layer; and a pad portion which penetrates the protection layer and the titanium nitride film, and which exposes the wiring film, the protection layer including a first silicon nitride film, an oxide film, and a second silicon nitride film which are layered in the stated order from the side of the wiring layer.

A semiconductor device includes: a substrate; a wiring formed above the substrate; a titanium nitride film formed on the wiring; an oxide film formed on the titanium nitride film; a silicon nitride film formed on the oxide film; and a pad portion exposing the wiring, and formed at a place where a first opening portion formed in the silicon nitride film and a second opening portion formed in the titanium nitride film overlap with each other in plan view, and being inside a third opening portion formed in the oxide film in plan view, wherein the silicon nitride film is formed on top of and in contact with the titanium nitride film inside the third opening portion in plan view.