H01L2224/03903

DIELECTRIC STRUCTURE FOR HIGH SPEED INTERCONNECT AND RELIABILITY ENHANCEMENT

A semiconductor package includes: a die having a conductive pad at a first side of the die; and a redistribution structure over the first side of the die and electrically coupled to the die. The redistribution structure includes: a first dielectric layer including a first dielectric material; a first via in the first dielectric layer, where the first via is electrically coupled to the conductive pad of the die; and a first dielectric structure embedded in the first dielectric layer, where the first dielectric structure includes a second dielectric material different from the first dielectric material, where the first dielectric structure laterally surrounds the first via and contacts sidewalls of the first via.

SEMICONDUCTOR DEVICE AND METHOD OF FABRICATING THE SAME
20250201743 · 2025-06-19 · ·

The present disclosure provides a semiconductor device and a method of fabricating the same, including a substrate, an extension pad array and a margin structure. The extension pad array is disposed on the substrate and includes a plurality of extension pads separately arranged along a first direction and a second direction. The margin structure is disposed outside the extension pad array and includes a plurality of first protrusions, and a plurality of second protrusions respectively contacting one corresponding first protrusion, wherein a side face of one of the first protrusions and a side face of one of the second protrusions adjacent to each other define an acute angle therebetween, and a portion of the extension pads is disposed between the two adjacent side faces.

Method for forming semiconductor package and semiconductor package
12368124 · 2025-07-22 · ·

The present disclosure provides a method for forming a semiconductor package and a semiconductor package. The method comprises providing a semiconductor wafer with at least one semiconductor device formed thereon, the at least one semiconductor device comprising a plurality of metal bond pads formed on the semiconductor wafer. The method further comprises forming a first photoresist layer having a first opening directly above at least a portion of a first metal bond pad; forming a first metal feature of a first height in the first opening; removing the first photoresist layer; forming a second photoresist layer having a second opening directly above at least a portion of the second metal bond pad; forming a second metal feature of a second height in the second opening; and removing the second photoresist layer. Using the method, metal bumps having different heights and different sizes can be formed in a controlled manner.